diff options
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 1a95e2efcb..f52cc89433 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -80,6 +80,45 @@ struct cse_rw_metadata { uint8_t sha256[VB2_SHA256_DIGEST_SIZE]; }; +/* CSE recovery sub-error codes */ +enum csme_failure_reason { + /* No error */ + CSE_NO_ERROR = 0, + + /* Unspecified error */ + CSE_ERROR_UNSPECIFIED = 1, + + /* CSE fails to boot from RW */ + CSE_LITE_SKU_RW_JUMP_ERROR = 2, + + /* CSE RW boot partition access error */ + CSE_LITE_SKU_RW_ACCESS_ERROR = 3, + + /* Fails to set next boot partition as RW */ + CSE_LITE_SKU_RW_SWITCH_ERROR = 4, + + /* CSE firmware update failure */ + CSE_LITE_SKU_FW_UPDATE_ERROR = 5, + + /* Fails to communicate with CSE */ + CSE_COMMUNICATION_ERROR = 6, + + /* Fails to wipe CSE runtime data */ + CSE_LITE_SKU_DATA_WIPE_ERROR = 7, + + /* CSE RW is not found */ + CSE_LITE_SKU_RW_BLOB_NOT_FOUND = 8, + + /* CSE CBFS RW SHA-256 mismatch with the provided SHA */ + CSE_LITE_SKU_RW_BLOB_SHA256_MISMATCH = 9, + + /* CSE CBFS RW metadata is not found */ + CSE_LITE_SKU_RW_METADATA_NOT_FOUND = 10, + + /* CSE CBFS RW blob layout is not correct */ + CSE_LITE_SKU_LAYOUT_MISMATCH_ERROR = 11, +}; + /* set up device for use in early boot enviroument with temp bar */ void heci_init(uintptr_t bar); /* |