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Diffstat (limited to 'src/soc/intel/common/block/fast_spi/fast_spi_def.h')
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi_def.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h
index bafe131877..883c3ce3eb 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h
+++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h
@@ -8,6 +8,9 @@
#define SPIDVID_OFFSET 0x0
#define SPIBAR_BIOS_CONTROL 0xdc
+/* Extended Bios Support Registers */
+#define SPI_CFG_BAR1 0xe0 /* SPI BAR1 MMIO */
+
/* Bit definitions for BIOS_CONTROL */
#define SPIBAR_BIOS_CONTROL_WPD (1 << 0)
#define SPIBAR_BIOS_CONTROL_LOCK_ENABLE (1 << 1)
@@ -15,6 +18,8 @@
#define SPIBAR_BIOS_CONTROL_PREFETCH_ENABLE (1 << 3)
#define SPIBAR_BIOS_CONTROL_EISS (1 << 5)
#define SPIBAR_BIOS_CONTROL_BILD (1 << 7)
+#define SPIBAR_BIOS_CONTROL_EXT_BIOS_ENABLE (1 << 27)
+#define SPIBAR_BIOS_CONTROL_EXT_BIOS_LIMIT(x) ((x) & ~(0xfff))
/* Register offsets from the MMIO region base (PCI_BASE_ADDRESS_0) */