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Diffstat (limited to 'src/soc/intel/common/acpi/pch_clk.asl')
-rw-r--r--src/soc/intel/common/acpi/pch_clk.asl37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/soc/intel/common/acpi/pch_clk.asl b/src/soc/intel/common/acpi/pch_clk.asl
new file mode 100644
index 0000000000..08863a3234
--- /dev/null
+++ b/src/soc/intel/common/acpi/pch_clk.asl
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#define PCR_BIOS_BUFFEN 0x8080
+
+Scope (\_SB)
+{
+ /* MTL PCH CLK */
+ Device (ICLK) {
+ Name (_HID, EISAID ("PNP0C02"))
+ Name (_UID, "SOCCLK")
+
+ Method (_STA)
+ {
+ /*
+ * Device is present, enabled and decoding its resources
+ * and should not be shown in UI
+ */
+ Return (0x3)
+ }
+
+ /*
+ * PCIe(100MHz) clock disable
+ * Arg0 - clock index
+ */
+ Method (CLKD, 1) {
+ \_SB.PCI0.PCRA (PID_ISCLK, PCR_BIOS_BUFFEN, Not (ShiftLeft (1, Arg0)))
+ }
+
+ /*
+ * PCIe(100MHz) clock enable
+ * Arg0 - clock index
+ */
+ Method (CLKE, 1) {
+ \_SB.PCI0.PCRO (PID_ISCLK, PCR_BIOS_BUFFEN, (ShiftLeft (1, Arg0)))
+ }
+ }
+}