diff options
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 1d4419b583..0a09cd4746 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -8,7 +8,6 @@ #include <console/console.h> #include <device/mmio.h> #include <device/pci_ops.h> -#include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> #include <intelblocks/pmclib.h> #include <intelblocks/acpi.h> @@ -20,7 +19,6 @@ #include <soc/pm.h> #include <soc/systemagent.h> #include <string.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> #include "chip.h" @@ -194,17 +192,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs) /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; |