diff options
Diffstat (limited to 'src/soc/intel/broadwell/romstage/raminit.c')
| -rw-r--r-- | src/soc/intel/broadwell/romstage/raminit.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 870952f79a..a5f688ea69 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -24,6 +24,7 @@ #include <cbmem.h> #include <console/console.h> #include <device/pci_def.h> +#include <lib.h> #include <string.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> @@ -73,6 +74,16 @@ void raminit(struct pei_data *pei_data) #endif } + /* + * Do not use saved pei data. Can be set by mainboard romstage + * to force a full train of memory on every boot. + */ + if (pei_data->disable_saved_data) { + printk(BIOS_DEBUG, "Disabling PEI saved data by request\n"); + pei_data->saved_data = NULL; + pei_data->saved_data_size = 0; + } + /* Determine if mrc.bin is in the cbfs. */ entry = (pei_wrapper_entry_t)cbfs_get_file_content( CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab); @@ -95,6 +106,9 @@ void raminit(struct pei_data *pei_data) report_memory_config(); + /* Basic memory sanity test */ + quick_ram_check(); + if (pei_data->boot_mode != SLEEP_STATE_S3) { cbmem_initialize_empty(); } else if (cbmem_initialize()) { |