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Diffstat (limited to 'src/soc/intel/broadwell/romstage/cache_as_ram.inc')
-rw-r--r--src/soc/intel/broadwell/romstage/cache_as_ram.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/romstage/cache_as_ram.inc b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
index 37d7f30a68..24720d14a3 100644
--- a/src/soc/intel/broadwell/romstage/cache_as_ram.inc
+++ b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
@@ -147,7 +147,7 @@ clear_mtrrs:
wrmsr
post_code(0x27)
- /* Enable caching for ram init code to run faster */
+ /* Enable caching for RAM init code to run faster */
movl $MTRR_PHYS_BASE(2), %ecx
movl $(CACHE_MRC_BASE | MTRR_TYPE_WRPROT), %eax
xorl %edx, %edx