summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/pch/lpc.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/broadwell/pch/lpc.c')
-rw-r--r--src/soc/intel/broadwell/pch/lpc.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 4d4d8610f2..8feae0f0a1 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -13,8 +13,6 @@
#include <acpi/acpi_gnvs.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
-#include <ec/google/chromeec/ec.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <string.h>
#include <soc/gpio.h>
#include <soc/iobp.h>
@@ -618,17 +616,6 @@ static void southcluster_inject_dsdt(const struct device *device)
/* CPU core count */
gnvs->pcnt = dev_count_cpu();
- if (CONFIG(CHROMEOS)) {
- /* Initialize Verified Boot data */
- chromeos_init_chromeos_acpi(&(gnvs->chromeos));
- if (CONFIG(EC_GOOGLE_CHROMEEC)) {
- gnvs->chromeos.vbt2 = google_ec_running_ro() ?
- ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
- } else {
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
- }
- }
-
/* Add it to DSDT. */
acpigen_write_scope("\\");
acpigen_write_name_dword("NVSA", (u32) gnvs);