diff options
Diffstat (limited to 'src/soc/intel/broadwell/finalize.c')
| -rw-r--r-- | src/soc/intel/broadwell/finalize.c | 45 |
1 files changed, 2 insertions, 43 deletions
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 4196144369..3dafc9defd 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -4,15 +4,9 @@ #include <console/console.h> #include <console/post_codes.h> #include <device/pci_ops.h> -#include <reg_script.h> -#include <spi-generic.h> #include <soc/pci_devs.h> -#include <soc/lpc.h> -#include <soc/me.h> -#include <soc/rcba.h> -#include <soc/spi.h> +#include <soc/pch.h> #include <soc/systemagent.h> -#include <southbridge/intel/common/spi.h> /* * 16.6 System Agent Configuration Locking @@ -55,48 +49,13 @@ static void broadwell_systemagent_finalize(void) MCHBAR32(0x6008) = MCHBAR32(0x6008); } -const struct reg_script pch_finalize_script[] = { -#if !CONFIG(EM100PRO_SPI_CONSOLE) - /* Lock SPIBAR */ - REG_MMIO_OR32(RCBA_BASE_ADDRESS + SPIBAR_OFFSET + SPIBAR_HSFS, - SPIBAR_HSFS_FLOCKDN), -#endif - - /* TC Lockdown */ - REG_MMIO_OR32(RCBA_BASE_ADDRESS + 0x0050, (1 << 31)), - - /* BIOS Interface Lockdown */ - REG_MMIO_OR32(RCBA_BASE_ADDRESS + GCS, (1 << 0)), - - /* Function Disable SUS Well Lockdown */ - REG_MMIO_OR8(RCBA_BASE_ADDRESS + FDSW, (1 << 7)), - - /* Global SMI Lock */ - REG_PCI_OR16(GEN_PMCON_1, SMI_LOCK), - - /* GEN_PMCON Lock */ - REG_PCI_OR8(GEN_PMCON_LOCK, SLP_STR_POL_LOCK | ACPI_BASE_LOCK), - - /* PMSYNC */ - REG_MMIO_OR32(RCBA_BASE_ADDRESS + PMSYNC_CONFIG, (1 << 31)), - - REG_SCRIPT_END -}; - static void broadwell_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); broadwell_systemagent_finalize(); - spi_finalize_ops(); - reg_script_run_on_dev(PCH_DEV_LPC, pch_finalize_script); - - /* Lock */ - RCBA32_OR(0x3a6c, 0x00000001); - - /* Read+Write this R/WO register */ - RCBA32(LCAP) = RCBA32(LCAP); + broadwell_pch_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); |