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-rw-r--r--src/soc/intel/alderlake/chip.h10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index f7412dc055..f1e07412b7 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -165,16 +165,6 @@ struct soc_intel_alderlake_config {
/* Enable C6 DRAM */
uint8_t enable_c6dram;
- /*
- * PRMRR size setting with below options
- * Disable: 0x0
- * 32MB: 0x2000000
- * 64MB: 0x4000000
- * 128 MB: 0x8000000
- * 256 MB: 0x10000000
- * 512 MB: 0x20000000
- */
- uint32_t PrmrrSize;
uint8_t PmTimerDisabled;
/*
* SerialIO device mode selection: