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-rw-r--r--src/soc/intel/alderlake/chip.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index b58b244607..ec6c0f5483 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -777,6 +777,16 @@ struct soc_intel_alderlake_config {
* Set this to 0 in order to disable hwp scalability tracking.
*/
bool enable_hwp_scalability_tracking;
+
+ /*
+ * (ADL-N/TWL only) Vccin Aux Imon Iccmax
+ * Defaults to 27000 (27A), the value has to align with HW design.
+ * Recommended value: 25000 (PD_TIER_PREMIUM) or 27000 (PD_TIER_VOLUME)
+ */
+ enum {
+ PD_TIER_PREMIUM = 25000,
+ PD_TIER_VOLUME = 27000
+ } vccin_aux_imon_iccmax;
};
typedef struct soc_intel_alderlake_config config_t;