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Diffstat (limited to 'src/soc/cavium/cn81xx')
-rw-r--r--src/soc/cavium/cn81xx/cpu.c2
-rw-r--r--src/soc/cavium/cn81xx/include/soc/cpu.h5
-rw-r--r--src/soc/cavium/cn81xx/mmu.c2
3 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/cavium/cn81xx/cpu.c b/src/soc/cavium/cn81xx/cpu.c
index 9504868dff..b655d8a0ed 100644
--- a/src/soc/cavium/cn81xx/cpu.c
+++ b/src/soc/cavium/cn81xx/cpu.c
@@ -81,7 +81,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
return 1;
/* Check stack here, instead of in cpu_secondary.S */
- if ((CONFIG_STACK_SIZE * cpu) > _stack_sec_size)
+ if ((CONFIG_STACK_SIZE * cpu) > REGION_SIZE(stack_sec))
return 1;
/* Write the address of the main entry point */
diff --git a/src/soc/cavium/cn81xx/include/soc/cpu.h b/src/soc/cavium/cn81xx/include/soc/cpu.h
index 1c6a30dda9..7d3647bda0 100644
--- a/src/soc/cavium/cn81xx/include/soc/cpu.h
+++ b/src/soc/cavium/cn81xx/include/soc/cpu.h
@@ -18,6 +18,7 @@
#define __SOC_CAVIUM_CN81XX_CPU_H__
#include <stdint.h>
+#include <symbols.h>
/**
* Number of the Core on which the program is currently running.
@@ -70,8 +71,6 @@ void secondary_cpu_init(size_t core_id);
/* Symbols in memlayout.ld */
-extern u8 _stack_sec[];
-extern u8 _estack_sec[];
-#define _stack_sec_size (_estack_sec - _stack_sec)
+DECLARE_REGION(stack_sec)
#endif /* __SOC_CAVIUM_CN81XX_CPU_H__ */
diff --git a/src/soc/cavium/cn81xx/mmu.c b/src/soc/cavium/cn81xx/mmu.c
index d6e7ac5ee1..17b43e77ee 100644
--- a/src/soc/cavium/cn81xx/mmu.c
+++ b/src/soc/cavium/cn81xx/mmu.c
@@ -31,7 +31,7 @@ void soc_mmu_init(void)
* Need to use secure mem attribute, as firmware is running in ARM TZ
* region.
*/
- mmu_config_range((void *)_ttb, _ttb_size, secure_mem);
+ mmu_config_range((void *)_ttb, REGION_SIZE(ttb), secure_mem);
mmu_config_range((void *)_dram, sdram_size_mb() * MiB, secure_mem);
/* IO space has the MSB set and is divided into 4 sub-regions:
* * NCB