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-rw-r--r--src/soc/amd/glinda/Kconfig1
-rw-r--r--src/soc/amd/glinda/Makefile.inc1
-rw-r--r--src/soc/amd/glinda/preload.c13
3 files changed, 1 insertions, 14 deletions
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig
index f4f49b922b..4db1193dfa 100644
--- a/src/soc/amd/glinda/Kconfig
+++ b/src/soc/amd/glinda/Kconfig
@@ -72,6 +72,7 @@ config SOC_AMD_GLINDA
select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct
select SOC_AMD_COMMON_FSP_DMI_TABLES # TODO: Check if this is still correct
select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_FSP_PRELOAD_FSPS
select SSE2
select UDK_2017_BINDING
select USE_DDR5
diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc
index 4d1ba5584d..76c6689681 100644
--- a/src/soc/amd/glinda/Makefile.inc
+++ b/src/soc/amd/glinda/Makefile.inc
@@ -40,7 +40,6 @@ ramstage-y += fsp_s_params.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += mca.c
-ramstage-y += preload.c
ramstage-y += reset.c
ramstage-y += root_complex.c
ramstage-y += uart.c
diff --git a/src/soc/amd/glinda/preload.c b/src/soc/amd/glinda/preload.c
deleted file mode 100644
index 47f3580714..0000000000
--- a/src/soc/amd/glinda/preload.c
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* TODO: Move to common? */
-
-#include <bootstate.h>
-#include <fsp/api.h>
-
-static void start_fsps_preload(void *unused)
-{
- preload_fsps();
-}
-
-BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, start_fsps_preload, NULL);