diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/mmio_util.c | 51 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/pm_io_access_util.c | 60 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpimmio.h | 4 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 1 |
9 files changed, 73 insertions, 55 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index e96169b9cc..e861c14487 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -30,6 +30,7 @@ config SOC_AMD_CEZANNE select SOC_AMD_COMMON_BLOCK_ACP_GEN1 select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO + select SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS select SOC_AMD_COMMON_BLOCK_ACPI_ALIB select SOC_AMD_COMMON_BLOCK_ACPI_CPPC select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE diff --git a/src/soc/amd/common/block/acpimmio/Kconfig b/src/soc/amd/common/block/acpimmio/Kconfig index 794ae3ed5e..9881385e4b 100644 --- a/src/soc/amd/common/block/acpimmio/Kconfig +++ b/src/soc/amd/common/block/acpimmio/Kconfig @@ -12,4 +12,10 @@ config SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM Add functions to access settings stored in the biosram region. This is only used by the SoCs using binaryPI and the old AGESA. +config SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS + bool + help + Add functions to access the PM register block via the indirect + IO register access interface. + endif # SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/soc/amd/common/block/acpimmio/Makefile.inc b/src/soc/amd/common/block/acpimmio/Makefile.inc index d1e0ab9add..269117358e 100644 --- a/src/soc/amd/common/block/acpimmio/Makefile.inc +++ b/src/soc/amd/common/block/acpimmio/Makefile.inc @@ -4,6 +4,9 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO),y) all-y += mmio_util.c smm-y += mmio_util.c +all-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS) += pm_io_access_util.c +smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS) += pm_io_access_util.c + all-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM) += biosram.c smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM) += biosram.c diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c index 59532efe6f..58fe83a6b4 100644 --- a/src/soc/amd/common/block/acpimmio/mmio_util.c +++ b/src/soc/amd/common/block/acpimmio/mmio_util.c @@ -41,15 +41,6 @@ DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR); #undef DECLARE_ACPIMMIO -void enable_acpimmio_decode_pm04(void) -{ - uint32_t dw; - - dw = pm_io_read32(ACPIMMIO_DECODE_REGISTER_04); - dw |= PM_04_ACPIMMIO_DECODE_EN; - pm_io_write32(ACPIMMIO_DECODE_REGISTER_04, dw); -} - void fch_enable_cf9_io(void) { pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | CF9_IO_EN); @@ -66,11 +57,6 @@ void fch_disable_legacy_dma_io(void) ~(LEGACY_DMA_IO_EN | LEGACY_DMA_IO_80_EN)); } -void fch_io_enable_legacy_io(void) -{ - pm_io_write32(PM_DECODE_EN, pm_io_read32(PM_DECODE_EN) | LEGACY_IO_EN); -} - void fch_enable_ioapic_decode(void) { pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | FCH_IOAPIC_EN); @@ -88,40 +74,3 @@ void fch_disable_kb_rst(void) { pm_write8(PM_RST_CTRL1, pm_read8(PM_RST_CTRL1) & ~KBRSTEN); } - -/* PM registers are accessed a byte at a time via CD6/CD7 */ -uint8_t pm_io_read8(uint8_t reg) -{ - outb(reg, PM_INDEX); - return inb(PM_DATA); -} - -uint16_t pm_io_read16(uint8_t reg) -{ - return (pm_io_read8(reg + sizeof(uint8_t)) << 8) | pm_io_read8(reg); -} - -uint32_t pm_io_read32(uint8_t reg) -{ - return (pm_io_read16(reg + sizeof(uint16_t)) << 16) | pm_io_read16(reg); -} - -void pm_io_write8(uint8_t reg, uint8_t value) -{ - outb(reg, PM_INDEX); - outb(value, PM_DATA); -} - -void pm_io_write16(uint8_t reg, uint16_t value) -{ - pm_io_write8(reg, value & 0xff); - value >>= 8; - pm_io_write8(reg + sizeof(uint8_t), value & 0xff); -} - -void pm_io_write32(uint8_t reg, uint32_t value) -{ - pm_io_write16(reg, value & 0xffff); - value >>= 16; - pm_io_write16(reg + sizeof(uint16_t), value & 0xffff); -} diff --git a/src/soc/amd/common/block/acpimmio/pm_io_access_util.c b/src/soc/amd/common/block/acpimmio/pm_io_access_util.c new file mode 100644 index 0000000000..692d6fbeff --- /dev/null +++ b/src/soc/amd/common/block/acpimmio/pm_io_access_util.c @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <types.h> +#include <arch/io.h> +#include <amdblocks/acpimmio.h> + +/* IO index/data for accessing PMIO prior to enabling MMIO decode */ +#define PM_INDEX 0xcd6 +#define PM_DATA 0xcd7 + +void enable_acpimmio_decode_pm04(void) +{ + uint32_t dw; + + dw = pm_io_read32(ACPIMMIO_DECODE_REGISTER_04); + dw |= PM_04_ACPIMMIO_DECODE_EN; + pm_io_write32(ACPIMMIO_DECODE_REGISTER_04, dw); +} + +void fch_io_enable_legacy_io(void) +{ + pm_io_write32(PM_DECODE_EN, pm_io_read32(PM_DECODE_EN) | LEGACY_IO_EN); +} + +/* PM registers are accessed a byte at a time via CD6/CD7 */ +uint8_t pm_io_read8(uint8_t reg) +{ + outb(reg, PM_INDEX); + return inb(PM_DATA); +} + +uint16_t pm_io_read16(uint8_t reg) +{ + return (pm_io_read8(reg + sizeof(uint8_t)) << 8) | pm_io_read8(reg); +} + +uint32_t pm_io_read32(uint8_t reg) +{ + return (pm_io_read16(reg + sizeof(uint16_t)) << 16) | pm_io_read16(reg); +} + +void pm_io_write8(uint8_t reg, uint8_t value) +{ + outb(reg, PM_INDEX); + outb(value, PM_DATA); +} + +void pm_io_write16(uint8_t reg, uint16_t value) +{ + pm_io_write8(reg, value & 0xff); + value >>= 8; + pm_io_write8(reg + sizeof(uint8_t), value & 0xff); +} + +void pm_io_write32(uint8_t reg, uint32_t value) +{ + pm_io_write16(reg, value & 0xffff); + value >>= 16; + pm_io_write16(reg + sizeof(uint16_t), value & 0xffff); +} diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index 25abfd507f..2f41591bef 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -6,10 +6,6 @@ #include <device/mmio.h> #include <types.h> -/* IO index/data for accessing PMIO prior to enabling MMIO decode */ -#define PM_INDEX 0xcd6 -#define PM_DATA 0xcd7 - /* * Power management registers: 0xfed80300 or index/data at IO 0xcd6/cd7. Valid for Mullins and * newer SoCs, but not for the generations with separate FCH or Kabini. diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index f372a4f432..90a4fc9907 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -34,6 +34,7 @@ config SOC_AMD_REMBRANDT_BASE select SOC_AMD_COMMON_BLOCK_ACP_GEN2 select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO + select SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS select SOC_AMD_COMMON_BLOCK_ACPI_ALIB select SOC_AMD_COMMON_BLOCK_ACPI_CPPC select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 9738d19149..33375bd569 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -29,6 +29,7 @@ config SOC_AMD_PICASSO select SOC_AMD_COMMON_BLOCK_ACP_GEN1 select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO + select SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS select SOC_AMD_COMMON_BLOCK_ACPI_ALIB select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE select SOC_AMD_COMMON_BLOCK_ACPI_GPIO diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 4ae08d20ae..0eeef09ec3 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -24,6 +24,7 @@ config SOC_AMD_STONEYRIDGE select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM + select SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS select SOC_AMD_COMMON_BLOCK_AOAC select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS select SOC_AMD_COMMON_BLOCK_CAR |