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-rw-r--r--src/soc/amd/common/block/gpio_banks/gpio.c10
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio.h23
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h33
3 files changed, 43 insertions, 23 deletions
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index 6f566341eb..f32558aa59 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -31,6 +31,16 @@ static inline void gpio_write32(gpio_t gpio_num, uint32_t value)
write32(gpio_ctrl_ptr(gpio_num), value);
}
+static inline uint8_t iomux_read8(uint8_t reg)
+{
+ return read8(acpimmio_iomux + reg);
+}
+
+static inline void iomux_write8(uint8_t reg, uint8_t value)
+{
+ write8(acpimmio_iomux + reg, value);
+}
+
static uint8_t get_gpio_mux(gpio_t gpio)
{
return iomux_read8(gpio);
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index bf84a2564e..c9d709b9a3 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -272,18 +272,6 @@ static inline void smbus_write8(uint8_t reg, uint8_t value)
write8(acpimmio_smbus + reg, value);
}
-/* These iomux_read/write8 are to be deprecated to enforce proper
- use of <gpio.h> API for pin configurations. */
-static inline uint8_t iomux_read8(uint8_t reg)
-{
- return read8(acpimmio_iomux + reg);
-}
-
-static inline void iomux_write8(uint8_t reg, uint8_t value)
-{
- write8(acpimmio_iomux + reg, value);
-}
-
static inline uint8_t misc_read8(uint8_t reg)
{
return read8(acpimmio_misc + reg);
@@ -314,17 +302,6 @@ static inline void misc_write32(uint8_t reg, uint32_t value)
write32(acpimmio_misc + reg, value);
}
-/* Old GPIO configuration registers */
-static inline uint8_t gpio_100_read8(uint8_t reg)
-{
- return read8(acpimmio_gpio_100 + reg);
-}
-
-static inline void gpio_100_write8(uint8_t reg, uint8_t value)
-{
- write8(acpimmio_gpio_100 + reg, value);
-}
-
static inline uint8_t xhci_pm_read8(uint8_t reg)
{
return read8(acpimmio_xhci_pm + reg);
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h
new file mode 100644
index 0000000000..e7ef80a760
--- /dev/null
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_legacy_gpio100.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H
+#define AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H
+
+#include <amdblocks/acpimmio.h>
+#include <device/mmio.h>
+#include <types.h>
+
+/* These iomux_read/write8 are to be deprecated to enforce proper
+ use of <gpio.h> API for pin configurations. */
+static inline uint8_t iomux_read8(uint8_t reg)
+{
+ return read8(acpimmio_iomux + reg);
+}
+
+static inline void iomux_write8(uint8_t reg, uint8_t value)
+{
+ write8(acpimmio_iomux + reg, value);
+}
+
+/* Old GPIO configuration registers */
+static inline uint8_t gpio_100_read8(uint8_t reg)
+{
+ return read8(acpimmio_gpio_100 + reg);
+}
+
+static inline void gpio_100_write8(uint8_t reg, uint8_t value)
+{
+ write8(acpimmio_gpio_100 + reg, value);
+}
+
+#endif /* AMD_BLOCK_ACPIMMIO_LEGACY_GPIO_100_H */