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-rw-r--r--src/soc/amd/picasso/chip.h4
-rw-r--r--src/soc/amd/picasso/fsp_params.c13
2 files changed, 10 insertions, 7 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 244d7831ec..9a7d2a5bfc 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -253,7 +253,9 @@ struct soc_amd_picasso_config {
bool acp_i2s_use_external_48mhz_osc;
/* eDP phy tuning settings */
- uint8_t dp_phy_override;
+ uint16_t edp_phy_override;
+ /* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */
+ uint8_t edp_physel;
struct {
uint8_t dp_vs_pemph_level;
diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c
index 731a564416..df5e1e61b4 100644
--- a/src/soc/amd/picasso/fsp_params.c
+++ b/src/soc/amd/picasso/fsp_params.c
@@ -145,12 +145,13 @@ static void fsp_assign_ioapic_upds(FSP_S_CONFIG *scfg)
static void fsp_edp_tuning_upds(FSP_S_CONFIG *scfg,
const struct soc_amd_picasso_config *cfg)
{
- if (cfg->dp_phy_override & ENABLE_EDP_TUNINGSET) {
- scfg->DpPhyOverride = cfg->dp_phy_override;
- scfg->DpVsPemphLevel = cfg->edp_tuningset.dp_vs_pemph_level;
- scfg->MarginDeemPh = cfg->edp_tuningset.margin_deemph;
- scfg->Deemph6db4 = cfg->edp_tuningset.deemph_6db4;
- scfg->BoostAdj = cfg->edp_tuningset.boostadj;
+ if (cfg->edp_phy_override & ENABLE_EDP_TUNINGSET) {
+ scfg->edp_phy_override = cfg->edp_phy_override;
+ scfg->edp_physel = cfg->edp_physel;
+ scfg->edp_dp_vs_pemph_level = cfg->edp_tuningset.dp_vs_pemph_level;
+ scfg->edp_margin_deemph = cfg->edp_tuningset.margin_deemph;
+ scfg->edp_deemph_6db_4 = cfg->edp_tuningset.deemph_6db4;
+ scfg->edp_boost_adj = cfg->edp_tuningset.boostadj;
}
if (cfg->edp_pwr_adjust_enable) {
scfg->pwron_digon_to_de = cfg->pwron_digon_to_de;