5 files changed, 67 insertions, 39 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h
index fa52da7535..576f0c6231 100644
--- a/src/soc/amd/common/block/include/amdblocks/spi.h
+++ b/src/soc/amd/common/block/include/amdblocks/spi.h
@@ -101,5 +101,11 @@ void spi_set_base(void *base);
 
 /* Get the SPI base address variable's value */
 uintptr_t spi_get_bar(void);
+uint8_t spi_read8(uint8_t reg);
+uint16_t spi_read16(uint8_t reg);
+uint32_t spi_read32(uint8_t reg);
+void spi_write8(uint8_t reg, uint8_t val);
+void spi_write16(uint8_t reg, uint16_t val);
+void spi_write32(uint8_t reg, uint32_t val);
 
 #endif /* __AMDBLOCKS_SPI_H__ */
diff --git a/src/soc/amd/common/block/spi/Makefile.inc b/src/soc/amd/common/block/spi/Makefile.inc
index 3d541b7052..c8b733fe04 100644
--- a/src/soc/amd/common/block/spi/Makefile.inc
+++ b/src/soc/amd/common/block/spi/Makefile.inc
@@ -18,4 +18,11 @@ ifeq ($(CONFIG_SPI_FLASH_SMM),y)
 smm-y += fch_spi.c
 endif
 
-endif
+bootblock-y += fch_spi_util.c
+romstage-y += fch_spi_util.c
+postcar-y += fch_spi_util.c
+ramstage-y += fch_spi_util.c
+verstage-y += fch_spi_util.c
+smm-$(CONFIG_SPI_FLASH_SMM) += fch_spi_util.c
+
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_SPI
diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index bac1452709..175be794ad 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -4,27 +4,10 @@
 #include <amdblocks/lpc.h>
 #include <amdblocks/spi.h>
 #include <arch/mmio.h>
-#include <assert.h>
 #include <console/console.h>
 #include <soc/iomap.h>
 #include <stdint.h>
 
-static uintptr_t spi_base;
-
-void spi_set_base(void *base)
-{
-	spi_base = (uintptr_t)base;
-}
-
-uintptr_t spi_get_bar(void)
-{
-	if (ENV_X86 && !spi_base)
-		spi_set_base((void *)lpc_get_spibase());
-	ASSERT(spi_base);
-
-	return spi_base;
-}
-
 static void fch_spi_set_spi100(int norm, int fast, int alt, int tpm)
 {
 	uintptr_t base = spi_get_bar();
diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c
index 0be6b0e72f..1e0c31ab27 100644
--- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c
+++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/mmio.h>
 #include <console/console.h>
 #include <spi_flash.h>
 #include <soc/pci_devs.h>
@@ -30,26 +29,6 @@
 #define   SPI_FIFO_RD_PTR_SHIFT		16
 #define   SPI_FIFO_RD_PTR_MASK		0x7f
 
-static uint8_t spi_read8(uint8_t reg)
-{
-	return read8((void *)(spi_get_bar() + reg));
-}
-
-static uint32_t spi_read32(uint8_t reg)
-{
-	return read32((void *)(spi_get_bar() + reg));
-}
-
-static void spi_write8(uint8_t reg, uint8_t val)
-{
-	write8((void *)(spi_get_bar() + reg), val);
-}
-
-static void spi_write32(uint8_t reg, uint32_t val)
-{
-	write32((void *)(spi_get_bar() + reg), val);
-}
-
 static void dump_state(const char *str, u8 phase)
 {
 	u8 dump_size;
diff --git a/src/soc/amd/common/block/spi/fch_spi_util.c b/src/soc/amd/common/block/spi/fch_spi_util.c
new file mode 100644
index 0000000000..7bac99191a
--- /dev/null
+++ b/src/soc/amd/common/block/spi/fch_spi_util.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/lpc.h>
+#include <amdblocks/spi.h>
+#include <arch/mmio.h>
+#include <assert.h>
+#include <stdint.h>
+
+static uintptr_t spi_base;
+
+void spi_set_base(void *base)
+{
+	spi_base = (uintptr_t)base;
+}
+
+uintptr_t spi_get_bar(void)
+{
+	if (ENV_X86 && !spi_base)
+		spi_set_base((void *)lpc_get_spibase());
+	ASSERT(spi_base);
+
+	return spi_base;
+}
+
+uint8_t spi_read8(uint8_t reg)
+{
+	return read8((void *)(spi_get_bar() + reg));
+}
+
+uint16_t spi_read16(uint8_t reg)
+{
+	return read8((void *)(spi_get_bar() + reg));
+}
+
+uint32_t spi_read32(uint8_t reg)
+{
+	return read32((void *)(spi_get_bar() + reg));
+}
+
+void spi_write8(uint8_t reg, uint8_t val)
+{
+	write8((void *)(spi_get_bar() + reg), val);
+}
+
+void spi_write16(uint8_t reg, uint16_t val)
+{
+	write16((void *)(spi_get_bar() + reg), val);
+}
+
+void spi_write32(uint8_t reg, uint32_t val)
+{
+	write32((void *)(spi_get_bar() + reg), val);
+}