diff options
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 33 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/Kconfig | 3 |
3 files changed, 24 insertions, 15 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index c0c500d3fa..81cf9748c6 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -72,6 +72,9 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_FSP_PCI select SSE2 select UDK_2017_BINDING + select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM + select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT + select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index b2ebabb6d4..84af18c23d 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -9,23 +9,30 @@ if SOC_AMD_PICASSO config CPU_SPECIFIC_OPTIONS def_bool y + select ACPI_SOC_NVS + select ADD_FSP_BINARIES if USE_AMD_BLOBS select ARCH_BOOTBLOCK_X86_32 select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select ARCH_X86 - select RESET_VECTOR_IN_RAM - select X86_AMD_FIXED_MTRRS - select X86_INIT_NEED_1_SIPI - select ACPI_SOC_NVS - select ADD_FSP_BINARIES if USE_AMD_BLOBS + select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS if VBOOT_STARTS_BEFORE_BOOTBLOCK select DRIVERS_I2C_DESIGNWARE select DRIVERS_USB_PCI_XHCI + select FSP_COMPRESS_FSP_M_LZMA + select FSP_COMPRESS_FSP_S_LZMA select GENERIC_GPIO_LIB - select IDT_IN_EVERY_STAGE select HAVE_ACPI_TABLES + select HAVE_CF9_RESET select HAVE_EM100_SUPPORT + select HAVE_SMI_HANDLER + select IDT_IN_EVERY_STAGE + select PARALLEL_MP_AP_WORK + select PLATFORM_USES_FSP2_0 + select PROVIDES_ROM_SHARING + select RESET_VECTOR_IN_RAM + select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN1 select SOC_AMD_COMMON_BLOCK_ACPI @@ -61,17 +68,13 @@ config CPU_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_FSP_DMI_TABLES - select PROVIDES_ROM_SHARING - select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH - select PARALLEL_MP_AP_WORK - select HAVE_SMI_HANDLER select SSE2 - select RTC - select PLATFORM_USES_FSP2_0 - select FSP_COMPRESS_FSP_M_LZMA - select FSP_COMPRESS_FSP_S_LZMA select UDK_2017_BINDING - select HAVE_CF9_RESET + select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM + select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT + select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE + select X86_AMD_FIXED_MTRRS + select X86_INIT_NEED_1_SIPI config ARCH_ALL_STAGES_X86 default n diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 96323dba29..1be53b5314 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -76,6 +76,9 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct select SSE2 select UDK_2017_BINDING + select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM + select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT + select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI |