diff options
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/hudson.c | 27 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/sd.c | 64 |
3 files changed, 0 insertions, 92 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index ca9df7f74c..416d4bdacf 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -72,7 +72,6 @@ ramstage-y += model_15_init.c ramstage-y += northbridge.c ramstage-y += reset.c ramstage-y += sata.c -ramstage-y += sd.c ramstage-y += sm.c ramstage-y += smbus.c ramstage-y += ramtop.c diff --git a/src/soc/amd/stoneyridge/hudson.c b/src/soc/amd/stoneyridge/hudson.c index af1095c819..0eee351b6a 100644 --- a/src/soc/amd/stoneyridge/hudson.c +++ b/src/soc/amd/stoneyridge/hudson.c @@ -63,33 +63,6 @@ u16 pm_read16(u16 reg) void hudson_enable(device_t dev) { printk(BIOS_DEBUG, "hudson_enable()\n"); - switch (dev->path.pci.devfn) { - case (0x14 << 3) | 7: /* 0:14.7 SD */ - if (dev->enabled == 0) { - // read the VENDEV ID - device_t sd_dev = dev_find_slot(0, PCI_DEVFN(0x14, 7)); - u32 sd_device_id = pci_read_config32(sd_dev, 0) >> 16; - /* turn off the SDHC controller in the PM reg */ - u8 reg8; - if (sd_device_id == PCI_DEVICE_ID_AMD_HUDSON_SD) { - reg8 = pm_read8(PM_HUD_SD_FLASH_CTRL); - reg8 &= ~BIT(0); - pm_write8(PM_HUD_SD_FLASH_CTRL, reg8); - } else if (sd_device_id - == PCI_DEVICE_ID_AMD_YANGTZE_SD) { - reg8 = pm_read8(PM_YANG_SD_FLASH_CTRL); - reg8 &= ~BIT(0); - pm_write8(PM_YANG_SD_FLASH_CTRL, reg8); - } - /* remove device 0:14.7 from PCI space */ - reg8 = pm_read8(PM_MANUAL_RESET); - reg8 &= ~BIT(6); - pm_write8(PM_MANUAL_RESET, reg8); - } - break; - default: - break; - } } static void hudson_init_acpi_ports(void) diff --git a/src/soc/amd/stoneyridge/sd.c b/src/soc/amd/stoneyridge/sd.c deleted file mode 100644 index 7188aad55f..0000000000 --- a/src/soc/amd/stoneyridge/sd.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Sage Electronic Engineering, LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> -#include <delay.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <arch/io.h> -#include <soc/hudson.h> - -static void sd_init(struct device *dev) -{ - u32 stepping; - - stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), - 0xfc); - - struct soc_amd_stoneyridge_config *sd_chip = - (struct soc_amd_stoneyridge_config *)(dev->chip_info); - - if (sd_chip->sd_mode == 3) { /* SD 3.0 mode */ - pci_write_config32(dev, 0xa4, 0x31fec8b2); - pci_write_config32(dev, 0xa8, 0x00002503); - pci_write_config32(dev, 0xb0, 0x02180c19); - pci_write_config32(dev, 0xd0, 0x0000078b); - } else { /* SD 2.0 mode */ - if ((stepping & 0x0000000f) == 0) { /* Stepping A0 */ - pci_write_config32(dev, 0xa4, 0x31de32b2); - pci_write_config32(dev, 0xb0, 0x01180c19); - pci_write_config32(dev, 0xd0, 0x0000058b); - } else { /* Stepping >= A1 */ - pci_write_config32(dev, 0xa4, 0x31fe3fb2); - pci_write_config32(dev, 0xb0, 0x01180c19); - pci_write_config32(dev, 0xd0, 0x0000078b); - } - } -} - -static struct device_operations sd_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = sd_init, - .scan_bus = 0, -}; - -static const struct pci_driver sd_driver __pci_driver = { - .ops = &sd_ops, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_YANGTZE_SD, -}; |