diff options
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/iomap.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 31cd12bb3e..0977bb360d 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -30,6 +30,7 @@ #define ACPI_GPE0_STS (ACPI_GPE0_BLK + 0x00) /* 4 bytes */ #define ACPI_GPE0_EN (ACPI_GPE0_BLK + 0x04) /* 4 bytes */ #define ACPI_PM_TMR_BLK (ACPI_IO_BASE + 0x18) /* 4 bytes */ +#define ACPI_CSTATE_CONTROL (ACPI_IO_BASE + 0x20) /* 8 bytes */ #define SMB_BASE_ADDR 0xb00 #define PM2_INDEX 0xcd0 #define PM2_DATA 0xcd1 diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index efa256fb14..460218e73c 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -22,6 +22,7 @@ #include <program_loading.h> #include <romstage_common.h> #include <romstage_handoff.h> +#include <soc/iomap.h> #include <soc/northbridge.h> #include <soc/pci_devs.h> #include <soc/southbridge.h> @@ -190,6 +191,10 @@ void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) platform->PkgPwrLimitAC = cfg->stapm_power_mw; platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; } + + /* Make binaryPi use ACPI_CSTATE_CONTROL as C state control IO range. It gets written + into MSR_CSTATE_ADDRESS and used in the _CST packages in the PSTATE SSDT. */ + platform->CStateIoBaseAddress = ACPI_CSTATE_CONTROL; } static void migrate_power_state(int is_recovery) |