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Diffstat (limited to 'src/soc/amd/stoneyridge/bootblock.c')
-rw-r--r--src/soc/amd/stoneyridge/bootblock.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock.c b/src/soc/amd/stoneyridge/bootblock.c
index 499ff633d4..8c6fde521a 100644
--- a/src/soc/amd/stoneyridge/bootblock.c
+++ b/src/soc/amd/stoneyridge/bootblock.c
@@ -30,10 +30,10 @@
/* Table to switch SCL pins to outputs to initially reset the I2C peripherals */
static const struct soc_i2c_scl_pin i2c_scl_pins[] = {
- { PAD_GPO(I2C0_SCL_PIN, HIGH), GPIO_I2C0_SCL },
- { PAD_GPO(I2C1_SCL_PIN, HIGH), GPIO_I2C1_SCL },
- { PAD_GPO(I2C2_SCL_PIN, HIGH), GPIO_I2C2_SCL },
- { PAD_GPO(I2C3_SCL_PIN, HIGH), GPIO_I2C3_SCL },
+ I2C_RESET_SCL_PIN(I2C0_SCL_PIN, GPIO_I2C0_SCL),
+ I2C_RESET_SCL_PIN(I2C1_SCL_PIN, GPIO_I2C1_SCL),
+ I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL),
+ I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
};
/* Set the MMIO Configuration Base Address, Bus Range, and misc MTRRs. */