3 files changed, 5 insertions, 11 deletions
diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h
index 7d4764567a..7bc1810dba 100644
--- a/src/soc/amd/picasso/include/soc/cpu.h
+++ b/src/soc/amd/picasso/include/soc/cpu.h
@@ -18,16 +18,8 @@
 
 #include <device/device.h>
 
-/*
- *  Set a variable MTRR in bootblock and/or romstage.  AGESA will use the lowest
- *  numbered registers.  Any values defined below are subtracted from the
- *  highest numbered registers.
- *
- *  todo: Revisit this once AGESA no longer programs MTRRs.
- */
 #define SOC_EARLY_VMTRR_FLASH 1
-#define SOC_EARLY_VMTRR_CAR_HEAP 2
-#define SOC_EARLY_VMTRR_TEMPRAM 3
+#define SOC_EARLY_VMTRR_TEMPRAM 2
 
 void picasso_init_cpus(struct device *dev);
 void check_mca(void);
diff --git a/src/soc/amd/picasso/include/soc/northbridge.h b/src/soc/amd/picasso/include/soc/northbridge.h
index f7df2772c5..65705b93f3 100644
--- a/src/soc/amd/picasso/include/soc/northbridge.h
+++ b/src/soc/amd/picasso/include/soc/northbridge.h
@@ -110,6 +110,8 @@ enum {
 	SMM_SUBREGION_NUM,
 };
 
+void amd_initcpuio(void);
+
 /*
  * Fills in the arguments for the entire SMM region covered by chipset
  * protections. e.g. TSEG.
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index b28522e60f..565ab3084d 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -322,7 +322,7 @@ void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm);
 void bootblock_fch_early_init(void);
 void bootblock_fch_init(void);
 /**
- * @brief Save the UMA bize returned by AGESA
+ * @brief Save the UMA bize
  *
  * @param size = in bytes
  *
@@ -330,7 +330,7 @@ void bootblock_fch_init(void);
  */
 void save_uma_size(uint32_t size);
 /**
- * @brief Save the UMA base address returned by AGESA
+ * @brief Save the UMA base address
  *
  * @param base = 64bit base address
  *