diff options
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
| -rw-r--r-- | src/soc/amd/picasso/chip.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index ff9c845898..39c70269da 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -23,33 +23,9 @@ #include <soc/i2c.h> #include <arch/acpi_device.h> -#define MAX_NODES 1 -#define MAX_DRAM_CH 1 -#define MAX_DIMMS_PER_CH 2 - #define PICASSO_I2C_DEV_MAX 4 struct soc_amd_picasso_config { - u8 spd_addr_lookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH]; - enum { - DRAM_CONTENTS_KEEP, - DRAM_CONTENTS_CLEAR - } dram_clear_on_reset; - - enum { - /* Do not enable UMA in the system. */ - UMAMODE_NONE, - /* Enable UMA with a specific size. */ - UMAMODE_SPECIFIED_SIZE, - /* Let AGESA determine the proper size. Non-legacy requires - * the resolution to be specified PLATFORM_CONFIGURATION */ - UMAMODE_AUTO_LEGACY, - UMAMODE_AUTO_NON_LEGACY, - } uma_mode; - - /* Used if UMAMODE_SPECIFIED_SIZE is set. */ - size_t uma_size; - /* * If sb_reset_i2c_slaves() is called, this devicetree register * defines which I2C SCL will be toggled 9 times at 100 KHz. @@ -60,18 +36,6 @@ struct soc_amd_picasso_config { */ u8 i2c_scl_reset; struct dw_i2c_bus_config i2c[PICASSO_I2C_DEV_MAX]; - u8 stapm_percent; - u32 stapm_time_ms; - u32 stapm_power_mw; - /* - * This specifies the LVDS/eDP power-up sequence time for the delay - * between VaryBL and BLON. - * 0 - Use the VBIOS default (default). The video BIOS default is 32ms. - * n - Values other than zero specify a setting of (4 * n) milliseconds - * time delay. - */ - u8 lvds_poseq_varybl_to_blon; - u8 lvds_poseq_blon_to_varybl; }; typedef struct soc_amd_picasso_config config_t; |