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Diffstat (limited to 'src/soc/amd/phoenix/chipset.cb')
-rw-r--r--src/soc/amd/phoenix/chipset.cb13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/soc/amd/phoenix/chipset.cb b/src/soc/amd/phoenix/chipset.cb
index 47b393d030..f1c32faf1b 100644
--- a/src/soc/amd/phoenix/chipset.cb
+++ b/src/soc/amd/phoenix/chipset.cb
@@ -17,12 +17,13 @@ chip soc/amd/phoenix
device pci 01.4 alias gpp_bridge_1_4 off ops amd_external_pcie_gpp_ops end
device pci 02.0 on end # Dummy Host Bridge, do not disable
- device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
- device pci 02.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end
- device pci 02.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end
- device pci 02.4 alias gpp_bridge_3 off ops amd_external_pcie_gpp_ops end
- device pci 02.5 alias gpp_bridge_4 off ops amd_external_pcie_gpp_ops end
- device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end
+ # The PCIe GPP aliases in this SoC match the device and function numbers
+ device pci 02.1 alias gpp_bridge_2_1 off ops amd_external_pcie_gpp_ops end
+ device pci 02.2 alias gpp_bridge_2_2 off ops amd_external_pcie_gpp_ops end
+ device pci 02.3 alias gpp_bridge_2_3 off ops amd_external_pcie_gpp_ops end
+ device pci 02.4 alias gpp_bridge_2_4 off ops amd_external_pcie_gpp_ops end
+ device pci 02.5 alias gpp_bridge_2_5 off ops amd_external_pcie_gpp_ops end
+ device pci 02.6 alias gpp_bridge_2_6 off ops amd_external_pcie_gpp_ops end
device pci 08.0 on end # Dummy Host Bridge, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A