diff options
Diffstat (limited to 'src/soc/amd/mendocino')
| -rw-r--r-- | src/soc/amd/mendocino/acpi.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/include/soc/msr.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 5bc893c458..f6a95bf565 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -152,8 +152,8 @@ uint32_t get_pstate_core_power(union pstate_msr pstate_reg) /* Voltage off for VID code 0x00 */ voltage_in_uvolts = 0; } else { - voltage_in_uvolts = - SERIAL_VID_BASE_MICROVOLTS + (SERIAL_VID_DECODE_MICROVOLTS * core_vid); + voltage_in_uvolts = SERIAL_VID_3_BASE_MICROVOLTS + + (SERIAL_VID_3_DECODE_MICROVOLTS * core_vid); } /* Power in mW */ diff --git a/src/soc/amd/mendocino/include/soc/msr.h b/src/soc/amd/mendocino/include/soc/msr.h index f8e6092afe..cb03425d2a 100644 --- a/src/soc/amd/mendocino/include/soc/msr.h +++ b/src/soc/amd/mendocino/include/soc/msr.h @@ -24,8 +24,8 @@ union pstate_msr { #define PSTATE_DEF_CORE_FREQ_BASE 25 /* Value defined in Serial VID Interface 3.0 spec (#56413, NDA only) */ -#define SERIAL_VID_DECODE_MICROVOLTS 5000 -#define SERIAL_VID_BASE_MICROVOLTS 245000L +#define SERIAL_VID_3_DECODE_MICROVOLTS 5000 +#define SERIAL_VID_3_BASE_MICROVOLTS 245000L #define MSR_CPPC_CAPABILITY_1 0xc00102b0 #define SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF 24 |