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-rw-r--r--src/soc/amd/cezanne/romstage.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c
index 63a6b07dc6..6b84728ad1 100644
--- a/src/soc/amd/cezanne/romstage.c
+++ b/src/soc/amd/cezanne/romstage.c
@@ -1,13 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpi.h>
#include <amdblocks/acpimmio.h>
+#include <amdblocks/fsp.h>
#include <amdblocks/memmap.h>
#include <amdblocks/pmlib.h>
#include <amdblocks/post_codes.h>
#include <console/console.h>
#include <cpu/cpu.h>
-#include <fsp/api.h>
#include <program_loading.h>
#include <romstage_common.h>
@@ -18,7 +17,7 @@ void __noreturn romstage_main(void)
/* Snapshot chipset state prior to any FSP call */
fill_chipset_state();
- fsp_memory_init(acpi_is_wakeup_s3());
+ amd_fsp_early_init();
/* Fixup settings FSP-M should not be changing */
fch_disable_legacy_dma_io();