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-rw-r--r--src/soc/amd/cezanne/acpi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c
index edf20c9b6f..631f388fdf 100644
--- a/src/soc/amd/cezanne/acpi.c
+++ b/src/soc/amd/cezanne/acpi.c
@@ -76,6 +76,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
+ /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
+ overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->duty_offset = 0; /* Not supported */