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-rw-r--r--src/soc/amd/cezanne/Kconfig4
-rw-r--r--src/soc/amd/cezanne/acpi/pci0.asl6
-rw-r--r--src/soc/amd/cezanne/fsp_m_params.c2
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index dbafa8c11d..16f1d3fdcd 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -216,10 +216,10 @@ config RO_REGION_ONLY
depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A
default "apu/amdfw"
-config MMCONF_BASE_ADDRESS
+config ECAM_MMCONF_BASE_ADDRESS
default 0xF8000000
-config MMCONF_BUS_NUMBER
+config ECAM_MMCONF_BUS_NUMBER
default 64
config MAX_CPUS
diff --git a/src/soc/amd/cezanne/acpi/pci0.asl b/src/soc/amd/cezanne/acpi/pci0.asl
index f9956b68c5..08ccbe6cf0 100644
--- a/src/soc/amd/cezanne/acpi/pci0.asl
+++ b/src/soc/amd/cezanne/acpi/pci0.asl
@@ -66,14 +66,14 @@ Device(PCI0) {
/* Declare memory between TOM1 and MMCONF as available for PCI MMIO. */
MM1B = TOM1
- Local0 = CONFIG_MMCONF_BASE_ADDRESS
+ Local0 = CONFIG_ECAM_MMCONF_BASE_ADDRESS
Local0 -= TOM1
MM1L = Local0
CreateWordField(CRES, ^PSB0._MAX, BMAX)
CreateWordField(CRES, ^PSB0._LEN, BLEN)
- BMAX = CONFIG_MMCONF_BUS_NUMBER - 1
- BLEN = CONFIG_MMCONF_BUS_NUMBER
+ BMAX = CONFIG_ECAM_MMCONF_BUS_NUMBER - 1
+ BLEN = CONFIG_ECAM_MMCONF_BUS_NUMBER
Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c
index 9f594d96ac..048b428521 100644
--- a/src/soc/amd/cezanne/fsp_m_params.c
+++ b/src/soc/amd/cezanne/fsp_m_params.c
@@ -70,7 +70,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mupd->FspmArchUpd.NvsBufferPtr = (uintptr_t)soc_fill_apob_cache();
- mcfg->pci_express_base_addr = CONFIG_MMCONF_BASE_ADDRESS;
+ mcfg->pci_express_base_addr = CONFIG_ECAM_MMCONF_BASE_ADDRESS;
mcfg->tseg_size = CONFIG_SMM_TSEG_SIZE;
mcfg->serial_port_base = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
mcfg->serial_port_use_mmio = CONFIG(DRIVERS_UART_8250MEM);