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-rw-r--r--src/soc/amd/cezanne/acpi/soc.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index 7e3a3ee6a8..f8f7a8a7a8 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -27,7 +27,9 @@ Scope(\_SB) {
#include <soc/amd/common/acpi/upep.asl>
+#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
#include <soc/amd/common/acpi/dptc.asl>
+#endif
#include "rtc_workaround.asl"