diff options
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 20 | ||||
-rw-r--r-- | src/northbridge/intel/e7505/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/pcie.c | 10 | ||||
-rw-r--r-- | src/northbridge/intel/i440bx/northbridge.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/i945/northbridge.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/pineview/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/pcie.c | 10 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/northbridge.c | 2 |
9 files changed, 28 insertions, 28 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 7e9cfd8d2a..b318be021d 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -186,7 +186,7 @@ static unsigned long add_ivhd_dev_entry(struct device *parent, struct device *de ivrs_ivhd_generic_t *ivhd_entry = (ivrs_ivhd_generic_t *)*current; ivhd_entry->type = type; - ivhd_entry->dev_id = dev->path.pci.devfn | (dev->bus->secondary << 8); + ivhd_entry->dev_id = dev->path.pci.devfn | (dev->upstream->secondary << 8); ivhd_entry->dte_setting = data; *current += sizeof(ivrs_ivhd_generic_t); } else if (type == IVHD_DEV_8_BYTE_ALIAS_SELECT) { @@ -195,12 +195,12 @@ static unsigned long add_ivhd_dev_entry(struct device *parent, struct device *de ivrs_ivhd_alias_t *ivhd_entry = (ivrs_ivhd_alias_t *)*current; ivhd_entry->type = type; - ivhd_entry->dev_id = dev->path.pci.devfn | (dev->bus->secondary << 8); + ivhd_entry->dev_id = dev->path.pci.devfn | (dev->upstream->secondary << 8); ivhd_entry->dte_setting = data; ivhd_entry->reserved1 = 0; ivhd_entry->reserved2 = 0; ivhd_entry->source_dev_id = parent->path.pci.devfn | - (parent->bus->secondary << 8); + (parent->upstream->secondary << 8); *current += sizeof(ivrs_ivhd_alias_t); } @@ -243,7 +243,7 @@ static void add_ivhd_device_entries(struct device *parent, struct device *dev, if (dev->path.type == DEVICE_PATH_PCI) { - if ((dev->bus->secondary == 0x0) && + if ((dev->upstream->secondary == 0x0) && (dev->path.pci.devfn == 0x0)) *root_level = depth; @@ -253,8 +253,8 @@ static void add_ivhd_device_entries(struct device *parent, struct device *dev, } } - if (dev->link_list) { - for (sibling = dev->link_list->children; sibling; sibling = sibling->sibling) + if (dev->downstream) { + for (sibling = dev->downstream->children; sibling; sibling = sibling->sibling) add_ivhd_device_entries(dev, sibling, depth + 1, depth, root_level, current, ivhd_length); } @@ -290,12 +290,12 @@ static unsigned long acpi_fill_ivrs11(unsigned long current, acpi_ivrs_t *ivrs_a ivhd_11->flags = ivrs_agesa->ivhd.flags & 0x3f; ivhd_11->length = sizeof(struct acpi_ivrs_ivhd_11); /* BDF <bus>:00.2 */ - ivhd_11->device_id = 0x02 | (nb_dev->bus->secondary << 8); + ivhd_11->device_id = 0x02 | (nb_dev->upstream->secondary << 8); /* PCI Capability block 0x40 (type 0xf, "Secure device") */ ivhd_11->capability_offset = 0x40; ivhd_11->iommu_base_low = ivrs_agesa->ivhd.iommu_base_low; ivhd_11->iommu_base_high = ivrs_agesa->ivhd.iommu_base_high; - ivhd_11->pci_segment_group = nb_dev->bus->segment_group; + ivhd_11->pci_segment_group = nb_dev->upstream->segment_group; ivhd_11->iommu_info = ivrs_agesa->ivhd.iommu_info; ivhd_11->iommu_attributes.perf_counters = (IOMMU_MMIO32(ivhd_11->iommu_base_low + 0x4000) >> 7) & 0xf; @@ -358,12 +358,12 @@ static unsigned long acpi_fill_ivrs(acpi_ivrs_t *ivrs, unsigned long current) ivrs->ivhd.flags = ivrs_agesa->ivhd.flags; ivrs->ivhd.length = sizeof(struct acpi_ivrs_ivhd); /* BDF <bus>:00.2 */ - ivrs->ivhd.device_id = 0x02 | (nb_dev->bus->secondary << 8); + ivrs->ivhd.device_id = 0x02 | (nb_dev->upstream->secondary << 8); /* PCI Capability block 0x40 (type 0xf, "Secure device") */ ivrs->ivhd.capability_offset = 0x40; ivrs->ivhd.iommu_base_low = ivrs_agesa->ivhd.iommu_base_low; ivrs->ivhd.iommu_base_high = ivrs_agesa->ivhd.iommu_base_high; - ivrs->ivhd.pci_segment_group = nb_dev->bus->segment_group; + ivrs->ivhd.pci_segment_group = nb_dev->upstream->segment_group; ivrs->ivhd.iommu_info = ivrs_agesa->ivhd.iommu_info; ivrs->ivhd.iommu_feature_info = ivrs_agesa->ivhd.iommu_feature_info; /* Enable EFR if supported */ diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index fa29ef58c3..23d60dc6dd 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -52,7 +52,7 @@ static void mch_domain_read_resources(struct device *dev) static void mch_domain_set_resources(struct device *dev) { - assign_resources(dev->link_list); + assign_resources(dev->downstream); } struct device_operations e7505_pci_domain_ops = { diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 50d0d89407..dc187911c8 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -122,7 +122,7 @@ static void mch_domain_set_resources(struct device *dev) report_resource_stored(dev, resource, ""); } - assign_resources(dev->link_list); + assign_resources(dev->downstream); } static void mch_domain_init(struct device *dev) diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c index 7fe57e9edd..4eeaa3f415 100644 --- a/src/northbridge/intel/haswell/pcie.c +++ b/src/northbridge/intel/haswell/pcie.c @@ -20,8 +20,8 @@ static const char *pcie_acpi_name(const struct device *dev) if (dev->path.type != DEVICE_PATH_PCI) return NULL; - assert(dev->bus); - if (dev->bus->secondary == 0) + assert(dev->upstream); + if (dev->upstream->secondary == 0) switch (dev->path.pci.devfn) { case PCI_DEVFN(1, 0): return "PEGP"; @@ -31,12 +31,12 @@ static const char *pcie_acpi_name(const struct device *dev) return "PEG2"; }; - struct device *const port = dev->bus->dev; + struct device *const port = dev->upstream->dev; assert(port); - assert(port->bus); + assert(port->upstream); if (dev->path.pci.devfn == PCI_DEVFN(0, 0) && - port->bus->secondary == 0 && + port->upstream->secondary == 0 && (port->path.pci.devfn == PCI_DEVFN(1, 0) || port->path.pci.devfn == PCI_DEVFN(1, 1) || port->path.pci.devfn == PCI_DEVFN(1, 2))) diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index d5881970bf..0a72cb7d60 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -34,8 +34,8 @@ static void i440bx_domain_read_resources(struct device *dev) pci_domain_read_resources(dev); - pci_tolm = find_pci_tolm(dev->link_list); - mc_dev = dev->link_list->children; + pci_tolm = find_pci_tolm(dev->downstream); + mc_dev = dev->downstream->children; if (mc_dev) { unsigned long tomk, tolmk; int idx; diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 34ebcb2481..79e9ee53b8 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -26,7 +26,7 @@ static void mch_domain_read_resources(struct device *dev) /* Can we find out how much memory we can use at most * this way? */ - pci_tolm = find_pci_tolm(dev->link_list); + pci_tolm = find_pci_tolm(dev->downstream); printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm); tolud = pci_read_config8(d0f0, TOLUD) << 24; @@ -65,7 +65,7 @@ static void mch_domain_set_resources(struct device *dev) for (res = dev->resource_list; res; res = res->next) report_resource_stored(dev, res, ""); - assign_resources(dev->link_list); + assign_resources(dev->downstream); } static const char *northbridge_acpi_name(const struct device *dev) diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index d7a6c84bfa..c24493aa2b 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -108,7 +108,7 @@ static void mch_domain_set_resources(struct device *dev) for (res = dev->resource_list; res; res = res->next) report_resource_stored(dev, res, ""); - assign_resources(dev->link_list); + assign_resources(dev->downstream); } static void mch_domain_init(struct device *dev) diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c index 96fb12fd51..244b0f5a40 100644 --- a/src/northbridge/intel/sandybridge/pcie.c +++ b/src/northbridge/intel/sandybridge/pcie.c @@ -13,8 +13,8 @@ static const char *pcie_acpi_name(const struct device *dev) if (dev->path.type != DEVICE_PATH_PCI) return NULL; - assert(dev->bus); - if (dev->bus->secondary == 0) + assert(dev->upstream); + if (dev->upstream->secondary == 0) switch (dev->path.pci.devfn) { case PCI_DEVFN(1, 0): return "PEGP"; @@ -26,12 +26,12 @@ static const char *pcie_acpi_name(const struct device *dev) return "PEG6"; }; - struct device *const port = dev->bus->dev; + struct device *const port = dev->upstream->dev; assert(port); - assert(port->bus); + assert(port->upstream); if (dev->path.pci.devfn == PCI_DEVFN(0, 0) && - port->bus->secondary == 0 && + port->upstream->secondary == 0 && (port->path.pci.devfn == PCI_DEVFN(1, 0) || port->path.pci.devfn == PCI_DEVFN(1, 1) || port->path.pci.devfn == PCI_DEVFN(1, 2) || diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index b037cf84eb..4987cae2f1 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -72,7 +72,7 @@ static void mch_domain_set_resources(struct device *dev) for (res = dev->resource_list; res; res = res->next) report_resource_stored(dev, res, ""); - assign_resources(dev->link_list); + assign_resources(dev->downstream); } static void mch_domain_init(struct device *dev) |