summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/raminit.c1
-rw-r--r--src/northbridge/intel/i945/early_init.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
-rw-r--r--src/northbridge/intel/pineview/romstage.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c1
6 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index fddada4ba0..96dc94e7d2 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -20,7 +20,6 @@
#include <arch/cbfs.h>
#include <cbfs.h>
#include <cf9_reset.h>
-#include <halt.h>
#include <ip_checksum.h>
#include <memory_info.h>
#include <mrc_cache.h>
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index a9de844f15..274296d482 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -21,7 +21,6 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cbmem.h>
-#include <halt.h>
#include <romstage_handoff.h>
#include "i945.h"
#include <pc80/mc146818rtc.h>
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 1e8cf65581..0cf03ae605 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -26,7 +26,6 @@
#include <pc80/mc146818rtc.h>
#include <spd.h>
#include <string.h>
-#include <halt.h>
#include "raminit.h"
#include "i945.h"
#include "chip.h"
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index bdb685b252..a3e6c39172 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -23,7 +23,6 @@
#include <device/pci_ops.h>
#include <cbmem.h>
#include <cf9_reset.h>
-#include <halt.h>
#include <romstage_handoff.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index cea3f2cd70..e60c37875b 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -25,7 +25,6 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <cbmem.h>
-#include <halt.h>
#include <timestamp.h>
#include <mrc_cache.h>
#include <southbridge/intel/bd82x6x/me.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index a68ae49c7c..ea3590f78d 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -28,7 +28,6 @@
#include <device/pci_def.h>
#include <lib.h>
#include <mrc_cache.h>
-#include <halt.h>
#include <timestamp.h>
#include "raminit.h"
#include "pei_data.h"