5 files changed, 29 insertions, 5 deletions
diff --git a/src/northbridge/intel/i82810/Makefile.inc b/src/northbridge/intel/i82810/Makefile.inc
index 16d702a24e..0c0a3c846d 100644
--- a/src/northbridge/intel/i82810/Makefile.inc
+++ b/src/northbridge/intel/i82810/Makefile.inc
@@ -20,3 +20,6 @@
 
 driver-y += northbridge.c
 
+romstage-y += raminit.c
+romstage-y += debug.c
+
diff --git a/src/northbridge/intel/i82810/debug.c b/src/northbridge/intel/i82810/debug.c
index 55af01bc22..44ee197284 100644
--- a/src/northbridge/intel/i82810/debug.c
+++ b/src/northbridge/intel/i82810/debug.c
@@ -1,4 +1,6 @@
-static void dump_spd_registers(void)
+#include "raminit.h"
+
+void dump_spd_registers(void)
 {
 #if CONFIG_DEBUG_RAM_SETUP
 	int i;
diff --git a/src/northbridge/intel/i82810/i82810.h b/src/northbridge/intel/i82810/i82810.h
index 75d92cbbeb..6695754763 100644
--- a/src/northbridge/intel/i82810/i82810.h
+++ b/src/northbridge/intel/i82810/i82810.h
@@ -18,6 +18,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#ifndef NORTHBRIDGE_INTEL_I82810_I82810_H
+#define NORTHBRIDGE_INTEL_I82810_I82810_H
+
 /*
  * Datasheet:
  *   - Name: Intel 810 Chipset:
@@ -43,3 +46,7 @@
 #define MISSC	0x72		/* Miscellaneous Control */
 #define MISSC2	0x80		/* Miscellaneous Control 2 */
 #define BUFF_SC	0x92		/* System Memory Buffer Strength Control */
+
+int smbus_read_byte(u8 device, u8 address);
+
+#endif
diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c
index 3ddc8a02e6..83b21b1286 100644
--- a/src/northbridge/intel/i82810/raminit.c
+++ b/src/northbridge/intel/i82810/raminit.c
@@ -22,7 +22,13 @@
 
 #include <spd.h>
 #include <delay.h>
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include <console/console.h>
 #include "i82810.h"
+#include "raminit.h"
 
 /*-----------------------------------------------------------------------------
 Macros and definitions.
@@ -421,7 +427,7 @@ static void set_dram_buffer_strength(void)
 Public interface.
 -----------------------------------------------------------------------------*/
 
-static void sdram_set_registers(void)
+void sdram_set_registers(void)
 {
 	u8 reg8;
 	u16 did;
@@ -454,7 +460,7 @@ static void sdram_set_registers(void)
 	pci_write_config8(PCI_DEV(0, 0, 0), MISSC2, reg8);
 }
 
-static void sdram_set_spd_registers(void)
+void sdram_set_spd_registers(void)
 {
 	spd_set_dram_size();
 	set_dram_buffer_strength();
@@ -464,7 +470,7 @@ static void sdram_set_spd_registers(void)
 /**
  * Enable SDRAM.
  */
-static void sdram_enable(void)
+void sdram_enable(void)
 {
 	int i;
 
diff --git a/src/northbridge/intel/i82810/raminit.h b/src/northbridge/intel/i82810/raminit.h
index f35832ecd0..fbf64239b2 100644
--- a/src/northbridge/intel/i82810/raminit.h
+++ b/src/northbridge/intel/i82810/raminit.h
@@ -27,4 +27,10 @@
 /* DIMM0 is at 0x50, DIMM1 is at 0x51. */
 #define DIMM_SPD_BASE 0x50
 
-#endif				/* NORTHBRIDGE_INTEL_I82810_RAMINIT_H */
+/* Function prototypes. */
+void sdram_set_registers(void);
+void sdram_set_spd_registers(void);
+void sdram_enable(void);
+void dump_spd_registers(void);
+
+#endif