diff options
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 8 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/romstage.c | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 6501bc41a8..952cc7b039 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -98,4 +98,12 @@ config RO_REGION_ONLY config INTEL_GMA_BCLV_OFFSET default 0x48254 +config ENABLE_DDR_2X_REFRESH + bool "Enable DRAM Refresh 2x support" + default n + help + When enabled, the memory controller will refresh the DRAM twice as often. + This probably only happens when the DRAM gets hot, but what MRC exactly + does when this setting is enabled has not been investigated. + endif diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c index ca948132b3..42a2a56c66 100644 --- a/src/northbridge/intel/haswell/romstage.c +++ b/src/northbridge/intel/haswell/romstage.c @@ -52,6 +52,7 @@ void mainboard_romstage_entry(void) .gpiobase = DEFAULT_GPIOBASE, .temp_mmio_base = 0xfed08000, .tseg_size = CONFIG_SMM_TSEG_SIZE, + .ddr_refresh_2x = CONFIG(ENABLE_DDR_2X_REFRESH), .max_ddr3_freq = 1600, }; |