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-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 5440140089..1fd252bcc0 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -100,17 +100,6 @@ static void add_fixed_resources(struct device *dev, int index)
struct resource *resource;
u32 pcie_config_base, pcie_config_size;
- /* Using uma_resource() here would fail as base & size cannot
- * be used as-is for a single MTRR. This would cause excessive
- * use of MTRRs.
- *
- * Use of mmio_resource() instead does not create UC holes by using
- * MTRRs, but making these regions uncacheable is taken care of by
- * making sure they do not overlap with any ram_resource().
- *
- * The resources can be changed to use separate mmio_resource()
- * calls after MTRR code is able to merge them wisely.
- */
mmio_resource(dev, index++, uma_memory_base >> 10, uma_memory_size >> 10);
if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {