diff options
Diffstat (limited to 'src/northbridge/intel/sandybridge/romstage.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 0426b831e7..61f5e4a50c 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -28,7 +28,7 @@ #include <device/pci_def.h> #include <device/device.h> #include <halt.h> -#include <security/tpm/tis.h> +#include <security/tpm/tspi.h> #include <northbridge/intel/sandybridge/chip.h> #include "southbridge/intel/bd82x6x/pch.h" #include <southbridge/intel/common/gpio.h> @@ -117,9 +117,8 @@ void mainboard_romstage_entry(unsigned long bist) northbridge_romstage_finalize(s3resume); - if (IS_ENABLED(CONFIG_LPC_TPM)) { - init_tpm(s3resume); - } + if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) + tpm_setup(s3resume); post_code(0x3f); } |