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Diffstat (limited to 'src/northbridge/intel/ironlake/memmap.c')
-rw-r--r--src/northbridge/intel/ironlake/memmap.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c
index bdb76c12bb..cb97c31479 100644
--- a/src/northbridge/intel/ironlake/memmap.c
+++ b/src/northbridge/intel/ironlake/memmap.c
@@ -35,13 +35,11 @@ void smm_region(uintptr_t *start, size_t *size)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- uintptr_t top_of_ram;
-
/* Cache at least 8 MiB below the top of ram, and at most 8 MiB
* above top of the ram. This satisfies MTRR alignment requirement
* with different TSEG size configurations.
*/
- top_of_ram = ALIGN_DOWN((uintptr_t)cbmem_top(), 8*MiB);
+ const uintptr_t top_of_ram = ALIGN_DOWN(cbmem_top(), 8 * MiB);
postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK);
postcar_frame_add_mtrr(pcf, top_of_ram, 8*MiB, MTRR_TYPE_WRBACK);
}