diff options
Diffstat (limited to 'src/northbridge/intel/i945')
| -rw-r--r-- | src/northbridge/intel/i945/ram_calc.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c index dbe74c40cf..ac1499e0fc 100644 --- a/src/northbridge/intel/i945/ram_calc.c +++ b/src/northbridge/intel/i945/ram_calc.c @@ -92,13 +92,12 @@ u32 decode_igd_memory_size(const u32 gms) void stage_cache_external_region(void **base, size_t *size) { - /* - * The ramstage cache lives in the TSEG region at RESERVED_SMM_OFFSET. + /* The stage cache lives at the end of the TSEG region. * The top of RAM is defined to be the TSEG base address. */ *size = CONFIG_SMM_RESERVED_SIZE; - *base = (void *)(northbridge_get_tseg_base() - + CONFIG_SMM_RESERVED_SIZE); + *base = (void *)((uintptr_t)northbridge_get_tseg_base() + + northbridge_get_tseg_size() - CONFIG_SMM_RESERVED_SIZE); } /* platform_enter_postcar() determines the stack to use after |