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Diffstat (limited to 'src/northbridge/intel/i945/romstage.c')
-rw-r--r--src/northbridge/intel/i945/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/romstage.c b/src/northbridge/intel/i945/romstage.c
index 6274e099c8..2333b7d79a 100644
--- a/src/northbridge/intel/i945/romstage.c
+++ b/src/northbridge/intel/i945/romstage.c
@@ -76,7 +76,8 @@ void mainboard_romstage_entry(void)
mainboard_late_rcba_config();
/* Chipset Errata! */
- fixup_i945_errata();
+ if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GM))
+ fixup_i945gm_errata();
/* Initialize the internal PCIe links before we go into stage2 */
i945_late_initialization(s3resume);