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Diffstat (limited to 'src/northbridge/intel/i855/reset_test.c')
-rw-r--r--src/northbridge/intel/i855/reset_test.c35
1 files changed, 0 insertions, 35 deletions
diff --git a/src/northbridge/intel/i855/reset_test.c b/src/northbridge/intel/i855/reset_test.c
deleted file mode 100644
index 9ca7854d47..0000000000
--- a/src/northbridge/intel/i855/reset_test.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Jon Dufresne <jon.dufresne@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define MCH_DRC 0x70
-#define DRC_DONE (1 << 29)
-
- /* If I have already booted once skip a bunch of initialization */
- /* To see if I have already booted I check to see if memory
- * has been enabled.
- */
-static int bios_reset_detected(void)
-{
- uint32_t dword;
-
- dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC);
-
- if ( (dword & DRC_DONE) != 0 ) {
- return 1;
- }
-
- return 0;
-}