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-rw-r--r--src/northbridge/intel/haswell/native_raminit/raminit_native.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
index 6a002548c1..ef61d4ee09 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
@@ -5,6 +5,7 @@
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/me.h>
+#include <southbridge/intel/lynxpoint/pch.h>
#include <types.h>
static bool early_init_native(int s3resume)
@@ -15,6 +16,8 @@ static bool early_init_native(int s3resume)
/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
+ early_usb_init();
+
if (!CONFIG(INTEL_LYNXPOINT_LP))
dmi_early_init();