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-rw-r--r--src/northbridge/intel/haswell/acpi/peg.asl60
1 files changed, 60 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/acpi/peg.asl b/src/northbridge/intel/haswell/acpi/peg.asl
new file mode 100644
index 0000000000..c4af375422
--- /dev/null
+++ b/src/northbridge/intel/haswell/acpi/peg.asl
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017-2018 Patrick Rudolph <siro@das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Device (PEGP)
+{
+ Name (_ADR, 0x00010000)
+
+ Method (_STA)
+ {
+ Return (((\_SB.PCI0.MCHC.DVEN >> 3) & 1) * 0xf)
+ }
+
+ Device (DEV0)
+ {
+ Name(_ADR, 0x00000000)
+ }
+}
+
+Device (PEG1)
+{
+ Name (_ADR, 0x00010001)
+
+ Method (_STA)
+ {
+ Return (((\_SB.PCI0.MCHC.DVEN >> 2) & 1) * 0xf)
+ }
+
+ Device (DEV0)
+ {
+ Name(_ADR, 0x00000000)
+ }
+}
+
+Device (PEG2)
+{
+ Name (_ADR, 0x00010002)
+
+ Method (_STA)
+ {
+ Return (((\_SB.PCI0.MCHC.DVEN >> 1) & 1) * 0xf)
+ }
+
+ Device (DEV0)
+ {
+ Name(_ADR, 0x00000000)
+ }
+}