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Diffstat (limited to 'src/northbridge/intel/e7501/raminit.c')
-rw-r--r--src/northbridge/intel/e7501/raminit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c
index f42bef2db0..2247a256af 100644
--- a/src/northbridge/intel/e7501/raminit.c
+++ b/src/northbridge/intel/e7501/raminit.c
@@ -1276,7 +1276,7 @@ static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
/* Trd */
- /* Set to a 7 clock read delay. This is for 133Mhz
+ /* Set to a 7 clock read delay. This is for 133MHz
* with a CAS latency of 2.5 if 2.0 a 6 clock
* delay is good */