diff options
Diffstat (limited to 'src/northbridge/amd/pi/00730F01')
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index eb38c428f5..926208c4d5 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -49,13 +49,13 @@ typedef struct dram_base_mask { u32 mask; //[47:27] at [28:8] and enable at bit 0 } dram_base_mask_t; -static unsigned node_nums; -static unsigned sblink; +static unsigned int node_nums; +static unsigned int sblink; static struct device *__f0_dev[MAX_NODE_NUMS]; static struct device *__f1_dev[MAX_NODE_NUMS]; static struct device *__f2_dev[MAX_NODE_NUMS]; static struct device *__f4_dev[MAX_NODE_NUMS]; -static unsigned fx_devs = 0; +static unsigned int fx_devs = 0; static dram_base_mask_t get_dram_base_mask(u32 nodeid) { @@ -124,14 +124,14 @@ static void get_fx_devs(void) printk(BIOS_DEBUG, "fx_devs = 0x%x\n", fx_devs); } -static u32 f1_read_config32(unsigned reg) +static u32 f1_read_config32(unsigned int reg) { if (fx_devs == 0) get_fx_devs(); return pci_read_config32(__f1_dev[0], reg); } -static void f1_write_config32(unsigned reg, u32 value) +static void f1_write_config32(unsigned int reg, u32 value) { int i; if (fx_devs == 0) @@ -169,11 +169,11 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn) * @retval 0 resource exists, not usable * @retval 1 resource exist, resource has been allocated before */ -static int reg_useable(unsigned reg, struct device *goal_dev, unsigned goal_nodeid, - unsigned goal_link) +static int reg_useable(unsigned int reg, struct device *goal_dev, + unsigned int goal_nodeid, unsigned int goal_link) { struct resource *res; - unsigned nodeid, link = 0; + unsigned int nodeid, link = 0; int result; res = 0; for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) { @@ -197,7 +197,8 @@ static int reg_useable(unsigned reg, struct device *goal_dev, unsigned goal_node return result; } -static struct resource *amdfam16_find_iopair(struct device *dev, unsigned nodeid, unsigned link) +static struct resource *amdfam16_find_iopair(struct device *dev, + unsigned int nodeid, unsigned int link) { struct resource *resource; u32 free_reg, reg; @@ -315,7 +316,7 @@ static void read_resources(struct device *dev) static void set_resource(struct device *dev, struct resource *resource, u32 nodeid) { resource_t rbase, rend; - unsigned reg, link_num; + unsigned int reg, link_num; char buf[50]; /* Make certain the resource has actually been set */ @@ -363,7 +364,7 @@ static void set_resource(struct device *dev, struct resource *resource, u32 node * but it is too difficult to deal with the resource allocation magic. */ -static void create_vga_resource(struct device *dev, unsigned nodeid) +static void create_vga_resource(struct device *dev, unsigned int nodeid) { struct bus *link; @@ -393,7 +394,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid) static void set_resources(struct device *dev) { - unsigned nodeid; + unsigned int nodeid; struct bus *bus; struct resource *res; @@ -807,7 +808,7 @@ struct chip_operations northbridge_amd_pi_00730F01_ops = { static void domain_read_resources(struct device *dev) { - unsigned reg; + unsigned int reg; /* Find the already assigned resource pairs */ get_fx_devs(); @@ -817,7 +818,7 @@ static void domain_read_resources(struct device *dev) limit = f1_read_config32(reg + 0x04); /* Is this register allocated? */ if ((base & 3) != 0) { - unsigned nodeid, reg_link; + unsigned int nodeid, reg_link; struct device *reg_dev; if (reg < 0xc0) { // mmio nodeid = (limit & 0xf) + (base&0x30); @@ -854,7 +855,7 @@ static void domain_enable_resources(struct device *dev) #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { - unsigned hole_startk; + unsigned int hole_startk; int node_id; }; static struct hw_mem_hole_info get_hw_mem_hole_info(void) @@ -971,7 +972,7 @@ static void domain_set_resources(struct device *dev) /* split the region to accommodate pci memory space */ if ((basek < 4*1024*1024) && (limitk > mmio_basek)) { if (basek <= mmio_basek) { - unsigned pre_sizek; + unsigned int pre_sizek; pre_sizek = mmio_basek - basek; if (pre_sizek > 0) { ram_resource(dev, (idx | i), basek, pre_sizek); @@ -1028,7 +1029,7 @@ static void sysconf_init(struct device *dev) // first node node_nums = ((pci_read_config32(dev, 0x60)>>4) & 7) + 1; //NodeCnt[2:0] } -static void add_more_links(struct device *dev, unsigned total_links) +static void add_more_links(struct device *dev, unsigned int total_links) { struct bus *link, *last = NULL; int link_num; @@ -1071,8 +1072,8 @@ static void cpu_bus_scan(struct device *dev) int i,j; int coreid_bits; int core_max = 0; - unsigned ApicIdCoreIdSize; - unsigned core_nums; + unsigned int ApicIdCoreIdSize; + unsigned int core_nums; int siblings = 0; unsigned int family; u32 modules = 0; @@ -1114,7 +1115,7 @@ static void cpu_bus_scan(struct device *dev) cpu_bus = dev->link_list; for (i = 0; i < node_nums; i++) { struct device *cdb_dev; - unsigned devn; + unsigned int devn; struct bus *pbus; devn = DEV_CDB + i; |