diff options
Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mct_d.h')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 9542bcb045..148f987023 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -726,13 +726,16 @@ int mctRead_SPD(u32 smaddr, u32 reg); void InterleaveNodes_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); void InterleaveChannels_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); void mct_BeforeDQSTrain_Samp_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat); -static void StoreDQSDatStrucVal_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u8 ChipSel); +void StoreDQSDatStrucVal_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u8 ChipSel); void phyAssistedMemFnceTraining(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); u8 mct_SaveRcvEnDly_D_1Pass(struct DCTStatStruc *pDCTstat, u8 pass); -static void mct_AdjustScrub_D(struct DCTStatStruc *pDCTstat, u16 *scrub_request); -static u8 mct_InitReceiver_D(struct DCTStatStruc *pDCTstat, u8 dct); -static void mct_Wait(u32 cycles); +u32 CheckNBCOFAutoPrechg(struct DCTStatStruc *pDCTstat, u32 dct); +u8 mct_AdjustDQSPosDelay_D(struct DCTStatStruc *pDCTstat, u8 dly); +void mct_AdjustScrub_D(struct DCTStatStruc *pDCTstat, u16 *scrub_request); +u8 mct_InitReceiver_D(struct DCTStatStruc *pDCTstat, u8 dct); +void mct_Wait(u32 cycles); u8 mct_RcvrRankEnabled_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u8 Channel, u8 ChipSel); u32 mct_GetRcvrSysAddr_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u8 channel, u8 receiver, u8 *valid); void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u32 addr); +void EarlySampleSupport_D(void); #endif |