diff options
Diffstat (limited to 'src/northbridge/amd/agesa/family14')
-rw-r--r-- | src/northbridge/amd/agesa/family14/acpi/northbridge.asl | 20 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family14/amdfam14_conf.c | 18 |
2 files changed, 19 insertions, 19 deletions
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index a1b4acb765..e95c95a019 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -30,7 +30,7 @@ Device(AGPB) { Name(_ADR, 0x00010000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APR1) } /* APIC mode */ + If(PMOD) { Return(APR1) } /* APIC mode */ Return (PR1) /* PIC Mode */ } } /* end AGPB */ @@ -40,7 +40,7 @@ Device(HDMI) { Name(_ADR, 0x00010001) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APR1) } /* APIC mode */ + If(PMOD) { Return(APR1) } /* APIC mode */ Return (PR1) /* PIC Mode */ } } /* end HDMI */ @@ -52,7 +52,7 @@ Device(PBR4) { Name(_ADR, 0x00040000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APS4) } /* APIC mode */ + If(PMOD) { Return(APS4) } /* APIC mode */ Return (PS4) /* PIC Mode */ } /* end _PRT */ } /* end PBR4 */ @@ -62,7 +62,7 @@ Device(PBR5) { Name(_ADR, 0x00050000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APS5) } /* APIC mode */ + If(PMOD) { Return(APS5) } /* APIC mode */ Return (PS5) /* PIC Mode */ } /* end _PRT */ } /* end PBR5 */ @@ -72,7 +72,7 @@ Device(PBR6) { Name(_ADR, 0x00060000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APS6) } /* APIC mode */ + If(PMOD) { Return(APS6) } /* APIC mode */ Return (PS6) /* PIC Mode */ } /* end _PRT */ } /* end PBR6 */ @@ -82,7 +82,7 @@ Device(PBR7) { Name(_ADR, 0x00070000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APS7) } /* APIC mode */ + If(PMOD) { Return(APS7) } /* APIC mode */ Return (PS7) /* PIC Mode */ } /* end _PRT */ } /* end PBR7 */ @@ -91,7 +91,7 @@ Device(PE20) { Name(_ADR, 0x00150000) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APE0) } /* APIC mode */ + If(PMOD) { Return(APE0) } /* APIC mode */ Return (PE0) /* PIC Mode */ } /* end _PRT */ } /* end PE20 */ @@ -100,7 +100,7 @@ Device(PE21) { Name(_ADR, 0x00150001) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APE1) } /* APIC mode */ + If(PMOD) { Return(APE1) } /* APIC mode */ Return (PE1) /* PIC Mode */ } /* end _PRT */ } /* end PE21 */ @@ -109,7 +109,7 @@ Device(PE22) { Name(_ADR, 0x00150002) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APE2) } /* APIC mode */ + If(PMOD) { Return(APE2) } /* APIC mode */ Return (APE2) /* PIC Mode */ } /* end _PRT */ } /* end PE22 */ @@ -118,7 +118,7 @@ Device(PE23) { Name(_ADR, 0x00150003) Name(_PRW, Package() {0x18, 4}) Method(_PRT,0) { - If(PMOD){ Return(APE3) } /* APIC mode */ + If(PMOD) { Return(APE3) } /* APIC mode */ Return (PE3) /* PIC Mode */ } /* end _PRT */ } /* end PE23 */ diff --git a/src/northbridge/amd/agesa/family14/amdfam14_conf.c b/src/northbridge/amd/agesa/family14/amdfam14_conf.c index 6db2b95771..28c16fb992 100644 --- a/src/northbridge/amd/agesa/family14/amdfam14_conf.c +++ b/src/northbridge/amd/agesa/family14/amdfam14_conf.c @@ -54,12 +54,12 @@ static void set_ht_c_io_addr_reg(u32 nodeid, u32 linkn, u32 ht_c_index, /* io range allocation */ tempreg = (nodeid&0xf) | ((nodeid & 0x30)<<(8-4)) | (linkn<<4) | ((io_max&0xf0)<<(12-4)); //limit - for (i=0; i<nodes; i++) { + for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 1); pci_write_config32(dev, 0xC4 + ht_c_index * 8, tempreg); } - tempreg = 3 /*| ( 3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? - for (i=0; i<nodes; i++){ + tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? + for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 1); pci_write_config32(dev, 0xC0 + ht_c_index * 8, tempreg); } @@ -73,7 +73,7 @@ static void clear_ht_c_io_addr_reg(u32 nodeid, u32 linkn, u32 ht_c_index, device_t dev; /* io range allocation */ - for (i=0; i<nodes; i++) { + for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 1); pci_write_config32(dev, 0xC4 + ht_c_index * 8, 0); pci_write_config32(dev, 0xC0 + ht_c_index * 8, 0); @@ -87,7 +87,7 @@ static u32 get_io_addr_index(u32 nodeid, u32 linkn) #if 0 u32 index; - for (index=0; index<256; index++) { + for (index = 0; index < 256; index++) { if (sysconf.conf_io_addrx[index+4] == 0) { sysconf.conf_io_addr[index+4] = (nodeid & 0x3f) ; sysconf.conf_io_addrx[index+4] = 1 | ((linkn & 0x7)<<4); @@ -103,7 +103,7 @@ static u32 get_mmio_addr_index(u32 nodeid, u32 linkn) #if 0 u32 index; - for (index=0; index<64; index++) { + for (index = 0; index < 64; index++) { if (sysconf.conf_mmio_addrx[index+8] == 0) { sysconf.conf_mmio_addr[index+8] = (nodeid & 0x3f) ; sysconf.conf_mmio_addrx[index+8] = 1 | ((linkn & 0x7)<<4); @@ -124,7 +124,7 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, tempreg = (nodeid&0xf) | ((nodeid & 0x30)<<(8-4)) | (linkn<<4) | ((io_max&0xf0)<<(12-4)); //limit pci_write_config32(__f1_dev[0], reg+4, tempreg); - tempreg = 3 /*| ( 3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? + tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? #if 0 // FIXME: can we use VGA reg instead? if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { @@ -158,7 +158,7 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi ********************************************************************/ u32 map_oprom_vendev(u32 vendev) { - u32 new_vendev=vendev; + u32 new_vendev = vendev; switch(vendev) { case 0x10029809: @@ -168,7 +168,7 @@ u32 map_oprom_vendev(u32 vendev) case 0x10029805: case 0x10029804: case 0x10029803: - new_vendev=0x10029802; + new_vendev = 0x10029802; break; } |