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-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig4
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Makefile.inc6
-rw-r--r--src/mainboard/intel/cannonlake_rvp/chromeos.fmd43
3 files changed, 53 insertions, 0 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
index 9d2a5f2279..f572f277d7 100644
--- a/src/mainboard/intel/cannonlake_rvp/Kconfig
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS
select BOARD_ROMSIZE_KB_16384
select SOC_INTEL_CANNONLAKE
select HAVE_ACPI_TABLES
+ select MAINBOARD_HAS_CHROMEOS
select GENERIC_SPD_BIN
config MAINBOARD_DIR
@@ -55,4 +56,7 @@ config DIMM_SPD_SIZE
int
default 512
+config VBOOT
+ select VBOOT_LID_SWITCH
+ select VBOOT_MOCK_SECDATA
endif
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
index 2f91e6bcb8..30be69933e 100644
--- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -19,6 +19,12 @@ subdirs-y += spd
bootblock-y += bootblock.c
bootblock-$(CONFIG_CHROMEOS) += chromeos.c
+verstage-$(CONFIG_CHROMEOS) += chromeos.c
+
+romstage-$(CONFIG_CHROMEOS) += chromeos.c
+
+ramstage-$(CONFIG_CHROMEOS) += chromeos.c
+
subdirs-y += variants/baseboard
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
diff --git a/src/mainboard/intel/cannonlake_rvp/chromeos.fmd b/src/mainboard/intel/cannonlake_rvp/chromeos.fmd
new file mode 100644
index 0000000000..4e23bbfec5
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/chromeos.fmd
@@ -0,0 +1,43 @@
+FLASH@0xff000000 0x1000000 {
+ SI_ALL@0x0 0x300000 {
+ SI_DESC@0x0 0x1000
+ SI_ME@0x1000 0x2ff000
+ }
+ SI_BIOS@0x300000 0xd00000 {
+ RW_SECTION_A@0x0 0x368000 {
+ VBLOCK_A@0x0 0x10000
+ FW_MAIN_A(CBFS)@0x10000 0x357fc0
+ RW_FWID_A@0x367fc0 0x40
+ }
+ RW_SECTION_B@0x368000 0x368000 {
+ VBLOCK_B@0x0 0x10000
+ FW_MAIN_B(CBFS)@0x10000 0x357fc0
+ RW_FWID_B@0x367fc0 0x40
+ }
+ RW_MISC@0x6d0000 0x30000 {
+ UNIFIED_MRC_CACHE@0x0 0x20000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ }
+ RW_ELOG@0x20000 0x4000
+ RW_SHARED@0x24000 0x4000 {
+ SHARED_DATA@0x0 0x2000
+ VBLOCK_DEV@0x2000 0x2000
+ }
+ RW_VPD@0x28000 0x2000
+ RW_NVRAM@0x2a000 0x6000
+ }
+ RW_LEGACY(CBFS)@0x700000 0x200000
+ WP_RO@0x900000 0x400000 {
+ RO_VPD@0x0 0x4000
+ RO_UNUSED@0x4000 0xc000
+ RO_SECTION@0x10000 0x3f0000 {
+ FMAP@0x0 0x800
+ RO_FRID@0x800 0x40
+ RO_FRID_PAD@0x840 0x7c0
+ GBB@0x1000 0xef000
+ COREBOOT(CBFS)@0xf0000 0x300000
+ }
+ }
+ }
+}