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-rw-r--r--src/mainboard/siemens/chili/variants/base/devicetree.cb56
-rw-r--r--src/mainboard/siemens/chili/variants/chili/devicetree.cb54
2 files changed, 0 insertions, 110 deletions
diff --git a/src/mainboard/siemens/chili/variants/base/devicetree.cb b/src/mainboard/siemens/chili/variants/base/devicetree.cb
index 4bc9b5f007..3b8343bfe6 100644
--- a/src/mainboard/siemens/chili/variants/base/devicetree.cb
+++ b/src/mainboard/siemens/chili/variants/base/devicetree.cb
@@ -7,21 +7,10 @@ chip soc/intel/cannonlake
register "PchHdaDspEnable" = "0"
register "PchHdaAudioLinkHda" = "1"
- device cpu_cluster 0 on end
-
device domain 0 on
- device ref system_agent on end
- device ref peg0 off end
- device ref peg1 off end
- device ref peg2 off end
device ref igpu on end
device ref dptf on end
- device ref ipu off end
- device ref gna off end
device ref thermal on end
- device ref ufs off end
- device ref gspi2 off end
- device ref ish off end
device ref xhci on
# USB2
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C?
@@ -37,20 +26,7 @@ chip soc/intel/cannonlake
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Realtek storage?
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)" # single blue
end
- device ref xdci off end
device ref shared_sram on end
- device ref cnvi_wifi off end
- device ref sdxc off end
- device ref i2c0 off end
- device ref i2c1 off end
- device ref i2c2 off end
- device ref i2c3 off end
- device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref heci4 off end
device ref sata on
register "SataSalpSupport" = "1"
register "SataPortsEnable[0]" = "1" # HDD / SSD
@@ -60,14 +36,6 @@ chip soc/intel/cannonlake
register "SataPortsDevSlp[0]" = "1" # M.2
register "SataPortsDevSlp[2]" = "1" # HDD / SSD
end
- device ref i2c4 off end
- device ref i2c5 off end
- device ref uart2 off end
- device ref emmc off end
- device ref pcie_rp1 off end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
device ref pcie_rp5 on
device pci 00.0 on end # x1 i219
register "PcieRpEnable[4]" = "1"
@@ -87,15 +55,6 @@ chip soc/intel/cannonlake
register "PcieRpSlotImplemented[6]" = "1"
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X"
end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
- device ref pcie_rp13 off end
- device ref pcie_rp14 off end
- device ref pcie_rp15 off end
- device ref pcie_rp16 off end
device ref pcie_rp17 on
register "PcieRpEnable[16]" = "1"
register "PcieClkSrcUsage[7]" = "16"
@@ -103,28 +62,13 @@ chip soc/intel/cannonlake
register "PcieRpSlotImplemented[16]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
end
- device ref pcie_rp18 off end
- device ref pcie_rp19 off end
- device ref pcie_rp20 off end
- device ref pcie_rp21 off end
- device ref pcie_rp22 off end
- device ref pcie_rp23 off end
- device ref pcie_rp24 off end
- device ref uart0 off end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref lpc_espi on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device ref p2sb hidden end
- device ref pmc hidden end
device ref hda on end
device ref smbus on end
- device ref fast_spi on end
device ref gbe on end
- device ref tracehub off end
end
end
diff --git a/src/mainboard/siemens/chili/variants/chili/devicetree.cb b/src/mainboard/siemens/chili/variants/chili/devicetree.cb
index b514d74cf1..d8bad2eb36 100644
--- a/src/mainboard/siemens/chili/variants/chili/devicetree.cb
+++ b/src/mainboard/siemens/chili/variants/chili/devicetree.cb
@@ -7,21 +7,10 @@ chip soc/intel/cannonlake
register "PchHdaDspEnable" = "0"
register "PchHdaAudioLinkHda" = "1"
- device cpu_cluster 0 on end
-
device domain 0 on
- device ref system_agent on end
- device ref peg0 off end
- device ref peg1 off end
- device ref peg2 off end
device ref igpu on end
device ref dptf on end
- device ref ipu off end
- device ref gna off end
device ref thermal on end
- device ref ufs off end
- device ref gspi2 off end
- device ref ish off end
device ref xhci on
# USB2
register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Debug
@@ -30,10 +19,7 @@ chip soc/intel/cannonlake
# USB3
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # Debug
end
- device ref xdci off end
device ref shared_sram on end
- device ref cnvi_wifi off end
- device ref sdxc off end
device ref i2c0 on
chip drivers/secunet/dmi
device i2c 0x57 on end # Serial EEPROM
@@ -94,28 +80,11 @@ chip soc/intel/cannonlake
}"
end
end
- device ref i2c1 off end
- device ref i2c2 off end
- device ref i2c3 off end
- device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref heci4 off end
- device ref sata off end
- device ref i2c4 off end
- device ref i2c5 off end
- device ref uart2 off end
- device ref emmc off end
device ref pcie_rp1 off
register "PcieRpEnable[0]" = "0" # Debug (x1)
register "PcieClkSrcUsage[2]" = "0"
register "PcieClkSrcClkReq[2]" = "2"
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
device ref pcie_rp5 on
register "PcieRpEnable[4]" = "1" # CORE (x1)
register "PcieClkSrcUsage[4]" = "4"
@@ -143,14 +112,6 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[0]" = "0"
register "PcieRpSlotImplemented[7]" = "0"
end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
- device ref pcie_rp13 off end
- device ref pcie_rp14 off end
- device ref pcie_rp15 off end
- device ref pcie_rp16 off end
device ref pcie_rp17 on
register "PcieRpEnable[16]" = "1" # NVMe (x4)
register "PcieClkSrcUsage[7]" = "16"
@@ -158,28 +119,13 @@ chip soc/intel/cannonlake
register "PcieRpSlotImplemented[16]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
end
- device ref pcie_rp18 off end
- device ref pcie_rp19 off end
- device ref pcie_rp20 off end
- device ref pcie_rp21 off end
- device ref pcie_rp22 off end
- device ref pcie_rp23 off end
- device ref pcie_rp24 off end
device ref uart0 on end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref lpc_espi on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device ref p2sb hidden end
- device ref pmc hidden end
device ref hda on end
device ref smbus on end
- device ref fast_spi on end
- device ref gbe off end
- device ref tracehub off end
end
end
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 11:55:12 +0000