diff options
Diffstat (limited to 'src/mainboard')
61 files changed, 180 insertions, 80 deletions
diff --git a/src/mainboard/biostar/th61-itx/early_init.c b/src/mainboard/biostar/th61-itx/early_init.c index b1a99e0ee8..9d537e6428 100644 --- a/src/mainboard/biostar/th61-itx/early_init.c +++ b/src/mainboard/biostar/th61-itx/early_init.c @@ -1,9 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <bootblock_common.h> #include <northbridge/intel/sandybridge/raminit_native.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> +#include <stdbool.h> const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, diff --git a/src/mainboard/google/drallion/ramstage.c b/src/mainboard/google/drallion/ramstage.c index 384e44bb57..ceba219ecf 100644 --- a/src/mainboard/google/drallion/ramstage.c +++ b/src/mainboard/google/drallion/ramstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <boardid.h> #include <smbios.h> #include <soc/gpio.h> #include <soc/ramstage.h> diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c index b9f2830541..5ea04856bf 100644 --- a/src/mainboard/google/foster/pmic.c +++ b/src/mainboard/google/foster/pmic.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/google/gale/cdp.c b/src/mainboard/google/gale/cdp.c index ab7bc8cf48..7d29df87f4 100644 --- a/src/mainboard/google/gale/cdp.c +++ b/src/mainboard/google/gale/cdp.c @@ -4,7 +4,6 @@ #include <soc/cdp.h> #include <soc/ebi2.h> #include <soc/clock.h> -#include <boardid.h> void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count) { diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c index cd55c93a40..39a342810a 100644 --- a/src/mainboard/google/gale/mainboard.c +++ b/src/mainboard/google/gale/mainboard.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <boot/coreboot_tables.h> #include <device/device.h> #include <gpio.h> diff --git a/src/mainboard/google/hatch/variants/ambassador/overridetree.cb b/src/mainboard/google/hatch/variants/ambassador/overridetree.cb index 7cc920d7ee..b4f3609ba0 100644 --- a/src/mainboard/google/hatch/variants/ambassador/overridetree.cb +++ b/src/mainboard/google/hatch/variants/ambassador/overridetree.cb @@ -213,15 +213,14 @@ chip soc/intel/cannonlake ## Active Policy register "policies.active[0]" = "{.target=DPTF_CPU, .thresholds={TEMP_PCT(94, 0),}}" - register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_1, - .thresholds={TEMP_PCT(70, 100), - TEMP_PCT(66, 90), - TEMP_PCT(62, 80), - TEMP_PCT(58, 70), - TEMP_PCT(53, 60), - TEMP_PCT(48, 50), - TEMP_PCT(43, 40), - TEMP_PCT(38, 30),}}" + register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0, + .thresholds={TEMP_PCT(72, 90), + TEMP_PCT(68, 80), + TEMP_PCT(64, 70), + TEMP_PCT(58, 60), + TEMP_PCT(51, 50), + TEMP_PCT(42, 40), + TEMP_PCT(35, 30),}}" ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" diff --git a/src/mainboard/google/hatch/variants/palkia/memory.c b/src/mainboard/google/hatch/variants/palkia/memory.c index 5b802033b6..f2a3a78aa7 100644 --- a/src/mainboard/google/hatch/variants/palkia/memory.c +++ b/src/mainboard/google/hatch/variants/palkia/memory.c @@ -2,7 +2,6 @@ #include <baseboard/variants.h> #include <baseboard/gpio.h> -#include <boardid.h> #include <gpio.h> #include <soc/cnl_memcfg_init.h> #include <string.h> diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c index ec9ae3af86..349fe34068 100644 --- a/src/mainboard/google/kahlee/OemCustomize.c +++ b/src/mainboard/google/kahlee/OemCustomize.c @@ -2,7 +2,6 @@ #include <chip.h> #include <amdblocks/agesawrapper.h> -#include <boardid.h> #include <gpio.h> #include <console/console.h> #include <soc/pci_devs.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c index 4b50d4909d..79fd4784af 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c +++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c @@ -2,7 +2,6 @@ #include <amdblocks/agesawrapper.h> #include <variant/gpio.h> -#include <boardid.h> #include <chip.h> #include <soc/pci_devs.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 8628074837..22d8bb8448 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -3,7 +3,6 @@ #include <baseboard/variants.h> #include <soc/gpio.h> #include <soc/southbridge.h> -#include <boardid.h> #include <variant/gpio.h> /* diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c index d01c51373e..599907e1da 100644 --- a/src/mainboard/google/nyan_big/pmic.c +++ b/src/mainboard/google/nyan_big/pmic.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c index d01c51373e..599907e1da 100644 --- a/src/mainboard/google/nyan_blaze/pmic.c +++ b/src/mainboard/google/nyan_blaze/pmic.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/google/octopus/variants/casta/gpio.c b/src/mainboard/google/octopus/variants/casta/gpio.c index 9c8e2a6abb..ea488ad90d 100644 --- a/src/mainboard/google/octopus/variants/casta/gpio.c +++ b/src/mainboard/google/octopus/variants/casta/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> diff --git a/src/mainboard/google/octopus/variants/dood/variant.c b/src/mainboard/google/octopus/variants/dood/variant.c index 1a8a37164a..635d721110 100644 --- a/src/mainboard/google/octopus/variants/dood/variant.c +++ b/src/mainboard/google/octopus/variants/dood/variant.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <boardid.h> #include <sar.h> #include <baseboard/variants.h> #include <delay.h> diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c index 8148dcef2d..6dbc74a303 100644 --- a/src/mainboard/google/octopus/variants/fleex/gpio.c +++ b/src/mainboard/google/octopus/variants/fleex/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> diff --git a/src/mainboard/google/octopus/variants/lick/gpio.c b/src/mainboard/google/octopus/variants/lick/gpio.c index e813fb122e..089b28a4cd 100644 --- a/src/mainboard/google/octopus/variants/lick/gpio.c +++ b/src/mainboard/google/octopus/variants/lick/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/sarien/Makefile.inc b/src/mainboard/google/sarien/Makefile.inc index 12e08be4c0..6bc69efbc9 100644 --- a/src/mainboard/google/sarien/Makefile.inc +++ b/src/mainboard/google/sarien/Makefile.inc @@ -12,7 +12,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += variants/$(VARIANT_DIR)/hda_verb.c bootblock-$(CONFIG_EC_GOOGLE_WILCO) += ec.c ramstage-$(CONFIG_EC_GOOGLE_WILCO) += ec.c diff --git a/src/mainboard/google/sarien/hda_verb.c b/src/mainboard/google/sarien/hda_verb.c deleted file mode 100644 index c26029774e..0000000000 --- a/src/mainboard/google/sarien/hda_verb.c +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include "variant/hda_verb.h" diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h b/src/mainboard/google/sarien/variants/arcada/hda_verb.c index 83acbc2857..b447e9f25b 100644 --- a/src/mainboard/google/sarien/variants/arcada/include/variant/hda_verb.h +++ b/src/mainboard/google/sarien/variants/arcada/hda_verb.c @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef MAINBOARD_HDA_VERB_H -#define MAINBOARD_HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -192,5 +189,3 @@ const u32 pc_beep_verbs[] = { }; AZALIA_ARRAY_SIZES; - -#endif diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h b/src/mainboard/google/sarien/variants/sarien/hda_verb.c index 5ec53ed112..316b110137 100644 --- a/src/mainboard/google/sarien/variants/sarien/include/variant/hda_verb.h +++ b/src/mainboard/google/sarien/variants/sarien/hda_verb.c @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef MAINBOARD_HDA_VERB_H -#define MAINBOARD_HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -135,5 +132,3 @@ const u32 pc_beep_verbs[] = { }; AZALIA_ARRAY_SIZES; - -#endif diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c index 66440227e2..26a7e90d5e 100644 --- a/src/mainboard/google/smaug/pmic.c +++ b/src/mainboard/google/smaug/pmic.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index d74476af16..ccde132176 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -58,6 +58,10 @@ fw_config option BOOT_SATA_DISABLED 0 option BOOT_SATA_ENABLED 1 end + field TOUCHPAD 25 + option REGULAR_TOUCHPAD 0 + option NUMPAD_TOUCHPAD 1 + end end chip soc/intel/tigerlake diff --git a/src/mainboard/google/volteer/variants/copano/overridetree.cb b/src/mainboard/google/volteer/variants/copano/overridetree.cb index d4e07460a2..1192129238 100644 --- a/src/mainboard/google/volteer/variants/copano/overridetree.cb +++ b/src/mainboard/google/volteer/variants/copano/overridetree.cb @@ -97,14 +97,26 @@ chip soc/intel/tigerlake end end device ref i2c5 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" + register "wake" = "GPE0_DW2_15" + register "probed" = "1" + device i2c 15 on + probe TOUCHPAD REGULAR_TOUCHPAD + end + end chip drivers/i2c/hid - register "generic.hid" = ""ELAN0000"" + register "generic.hid" = ""ELAN2701"" register "generic.desc" = ""ELAN Touchpad"" register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" register "generic.wake" = "GPE0_DW2_15" register "generic.probed" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 15 on end + device i2c 15 on + probe TOUCHPAD NUMPAD_TOUCHPAD + end end end device ref pch_espi on diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb index 96c109fbb5..608535e834 100644 --- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb +++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb @@ -21,6 +21,9 @@ chip soc/intel/tigerlake .tdp_pl4 = 105, }" + register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC0)" # Type-C port 1 + register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC3)" # Type-C port 0 + #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ @@ -56,10 +59,24 @@ chip soc/intel/tigerlake }, .i2c[5] = { .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 155, + .scl_hcnt = 80, + .sda_hold = 36, + }, }, }" device domain 0 on + device ref tbt_pcie_rp0 on + probe DB_USB USB4_GEN3 + end + + device ref tbt_pcie_rp1 on + probe DB_USB USB4_GEN3 + end + device ref i2c0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" @@ -164,7 +181,7 @@ chip soc/intel/tigerlake device ref tcss_usb3_port1 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-C Port C1 (DB)"" + register "desc" = ""USB3 Type-C Port C1 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 2)" device ref tcss_usb3_port2 on @@ -178,13 +195,13 @@ chip soc/intel/tigerlake chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port A0 (MLB)"" + register "desc" = ""USB2 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_A" register "group" = "ACPI_PLD_GROUP(1, 1)" device ref usb2_port1 on end end chip drivers/usb/acpi - register "desc" = ""USB2 Type-C Port C1 (DB)"" + register "desc" = ""USB2 Type-C Port C1 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port4 on @@ -209,7 +226,7 @@ chip soc/intel/tigerlake device ref usb2_port10 on end end chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port A0 (MLB)"" + register "desc" = ""USB3 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_USB3_A" register "group" = "ACPI_PLD_GROUP(1, 2)" device ref usb3_port1 on end diff --git a/src/mainboard/google/volteer/variants/voema/include/variant/acpi/mipi_camera.asl b/src/mainboard/google/volteer/variants/voema/include/variant/acpi/mipi_camera.asl index 53f5d03783..4ef83fd33d 100644 --- a/src/mainboard/google/volteer/variants/voema/include/variant/acpi/mipi_camera.asl +++ b/src/mainboard/google/volteer/variants/voema/include/variant/acpi/mipi_camera.asl @@ -271,4 +271,70 @@ Scope (\_SB.PCI0.I2C2) } }) } + Device (NVM0) + { + Name (_HID, "PRP0001") // _HID: Hardware ID + Name (_UID, 0x01) // _UID: Unique ID + Name (_DDN, "AT24 EEPROM") // _DDN: DOS Device Name + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + I2cSerialBusV2 (0x0050, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + Name (_DEP, Package (0x01) // _DEP: Dependencies + { + CAM1 + }) + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + FCPR + }) + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + FCPR + }) + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, + Package (0x06) + { + Package (0x02) + { + "size", + 0x2000 + }, + Package (0x02) + { + "pagesize", + One + }, + Package (0x02) + { + "read-only", + One + }, + Package (0x02) + { + "address-width", + 0x10 + }, + Package (0x02) + { + "compatible", + "atmel,24c64" + }, + Package (0x02) + { + "i2c-allow-low-power-probe", + 0x01 + } + } + }) + } } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c index 0b658a4129..948ce8f9d4 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c @@ -3,7 +3,6 @@ #include <baseboard/variants.h> #include <soc/gpio.h> #include <stdlib.h> -#include <boardid.h> #include <variant/gpio.h> static const struct soc_amd_gpio early_gpio_table[] = { diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 12d2890ce2..473ffb10cb 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/smi.h> #include <stdlib.h> -#include <boardid.h> #include <variant/gpio.h> static const struct soc_amd_gpio gpio_set_stage_ram[] = { diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index a2ad51755f..341357e8cd 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -8,7 +8,6 @@ #include <soc/gpio.h> #include <soc/smi.h> #include <stdlib.h> -#include <boardid.h> #include <variant/gpio.h> static const struct soc_amd_gpio gpio_set_stage_ram[] = { diff --git a/src/mainboard/google/zork/variants/berknip/gpio.c b/src/mainboard/google/zork/variants/berknip/gpio.c index ae2d02a48d..2452a1defe 100644 --- a/src/mainboard/google/zork/variants/berknip/gpio.c +++ b/src/mainboard/google/zork/variants/berknip/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c index 2b46938e9b..a71aa78f02 100644 --- a/src/mainboard/google/zork/variants/dalboz/gpio.c +++ b/src/mainboard/google/zork/variants/dalboz/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/dirinboz/gpio.c b/src/mainboard/google/zork/variants/dirinboz/gpio.c index 7f9582c9b6..aeebd0707b 100644 --- a/src/mainboard/google/zork/variants/dirinboz/gpio.c +++ b/src/mainboard/google/zork/variants/dirinboz/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c index f86d926e2e..295fb21de2 100644 --- a/src/mainboard/google/zork/variants/ezkinil/gpio.c +++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/gumboz/gpio.c b/src/mainboard/google/zork/variants/gumboz/gpio.c index aac25bb353..501c14402e 100644 --- a/src/mainboard/google/zork/variants/gumboz/gpio.c +++ b/src/mainboard/google/zork/variants/gumboz/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c index 9b36e3747e..778c6e4407 100644 --- a/src/mainboard/google/zork/variants/morphius/gpio.c +++ b/src/mainboard/google/zork/variants/morphius/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/shuboz/gpio.c b/src/mainboard/google/zork/variants/shuboz/gpio.c index 0fd867e8d4..db20e44699 100644 --- a/src/mainboard/google/zork/variants/shuboz/gpio.c +++ b/src/mainboard/google/zork/variants/shuboz/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/trembyle/gpio.c b/src/mainboard/google/zork/variants/trembyle/gpio.c index 4d73ea0122..0546df4ae2 100644 --- a/src/mainboard/google/zork/variants/trembyle/gpio.c +++ b/src/mainboard/google/zork/variants/trembyle/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c index c6ef161647..5c918fddde 100644 --- a/src/mainboard/google/zork/variants/vilboz/gpio.c +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -2,7 +2,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <boardid.h> #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index c3afe1372a..ad5cc7e511 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -24,7 +24,17 @@ chip soc/amd/picasso register "telemetry_vddcr_soc_offset" = "168" # eDP phy tuning settings - register "dp_phy_override" = "ENABLE_EDP_TUNINGSET" + register "edp_phy_override" = "ENABLE_EDP_TUNINGSET" + + # bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 + register "edp_physel" = "0x1" + + register "edp_tuningset" = "{ + .dp_vs_pemph_level = 0x00, + .margin_deemph = 0x004b, + .deemph_6db4 = 0x0, + .boostadj = 0x80, + }" # eDP power sequence. all pwr sequence numbers below are in uint of 4ms, # and "0" as default value @@ -38,13 +48,6 @@ chip soc/amd/picasso register "pwrdown_bloff_to_varybloff" = "5" register "min_allowed_bl_level" = "0" - register "edp_tuningset" = "{ - .dp_vs_pemph_level = 0x0, - .deemph_6db4 = 0x004b, - .boostadj = 0x0, - .margin_deemph = 0x80, - }" - # USB OC pin mapping register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1 diff --git a/src/mainboard/intel/glkrvp/romstage.c b/src/mainboard/intel/glkrvp/romstage.c index f1e544cfa8..868a4c6757 100644 --- a/src/mainboard/intel/glkrvp/romstage.c +++ b/src/mainboard/intel/glkrvp/romstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <string.h> #include <baseboard/variants.h> -#include <boardid.h> #include <soc/meminit.h> #include <soc/romstage.h> diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index a600d0a15b..9f8187fcf2 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -8,7 +8,6 @@ #include <soc/iomap.h> #include <soc/nvs.h> #include <soc/device_nvs.h> -#include <boardid.h> #include "onboard.h" void mainboard_fill_gnvs(struct global_nvs *gnvs) diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c index d3d6168d15..0e7f88c2ef 100644 --- a/src/mainboard/intel/strago/gpio.c +++ b/src/mainboard/intel/strago/gpio.c @@ -2,7 +2,6 @@ #include "irqroute.h" #include <soc/gpio.h> -#include <boardid.h> #include "onboard.h" #include "gpio.h" diff --git a/src/mainboard/intel/strago/ramstage.c b/src/mainboard/intel/strago/ramstage.c index eac843d903..e7ed500497 100644 --- a/src/mainboard/intel/strago/ramstage.c +++ b/src/mainboard/intel/strago/ramstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/ramstage.h> -#include <boardid.h> #include "onboard.h" void mainboard_silicon_init_params(SILICON_INIT_UPD *params) diff --git a/src/mainboard/intel/strago/romstage.c b/src/mainboard/intel/strago/romstage.c index 0bb4476075..331db041f3 100644 --- a/src/mainboard/intel/strago/romstage.c +++ b/src/mainboard/intel/strago/romstage.c @@ -2,7 +2,6 @@ #include <soc/romstage.h> #include "onboard.h" -#include <boardid.h> void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) diff --git a/src/mainboard/lenovo/l520/cmos.default b/src/mainboard/lenovo/l520/cmos.default index 979f132863..681c40e78b 100644 --- a/src/mainboard/lenovo/l520/cmos.default +++ b/src/mainboard/lenovo/l520/cmos.default @@ -14,3 +14,4 @@ sticky_fn=Disable trackpoint=Enable backlight=Both usb_always_on=Disable +me_state=Normal diff --git a/src/mainboard/lenovo/l520/cmos.layout b/src/mainboard/lenovo/l520/cmos.layout index e96915d2d1..a3f5308aa4 100644 --- a/src/mainboard/lenovo/l520/cmos.layout +++ b/src/mainboard/lenovo/l520/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 10 backlight -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 13 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -89,6 +91,8 @@ enumerations 12 0 Disable 12 1 AC and battery 12 2 AC only +13 0 Normal +13 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default index 467f965829..8244071b8a 100644 --- a/src/mainboard/lenovo/t420/cmos.default +++ b/src/mainboard/lenovo/t420/cmos.default @@ -14,3 +14,4 @@ sticky_fn=Disable trackpoint=Enable hybrid_graphics_mode=Integrated Only usb_always_on=Disable +me_state=Normal diff --git a/src/mainboard/lenovo/t420/cmos.layout b/src/mainboard/lenovo/t420/cmos.layout index e1d15be56b..daf569c0af 100644 --- a/src/mainboard/lenovo/t420/cmos.layout +++ b/src/mainboard/lenovo/t420/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 13 usb_always_on -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 14 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -97,6 +99,8 @@ enumerations 13 0 Disable 13 1 AC and battery 13 2 AC only +14 0 Normal +14 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default index 467f965829..8244071b8a 100644 --- a/src/mainboard/lenovo/t420s/cmos.default +++ b/src/mainboard/lenovo/t420s/cmos.default @@ -14,3 +14,4 @@ sticky_fn=Disable trackpoint=Enable hybrid_graphics_mode=Integrated Only usb_always_on=Disable +me_state=Normal diff --git a/src/mainboard/lenovo/t420s/cmos.layout b/src/mainboard/lenovo/t420s/cmos.layout index e1d15be56b..daf569c0af 100644 --- a/src/mainboard/lenovo/t420s/cmos.layout +++ b/src/mainboard/lenovo/t420s/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 13 usb_always_on -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 14 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -97,6 +99,8 @@ enumerations 13 0 Disable 13 1 AC and battery 13 2 AC only +14 0 Normal +14 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default index e65869b332..26795fe5cf 100644 --- a/src/mainboard/lenovo/t430/cmos.default +++ b/src/mainboard/lenovo/t430/cmos.default @@ -15,3 +15,4 @@ trackpoint=Enable backlight=Both usb_always_on=Disable hybrid_graphics_mode=Integrated Only +me_state=Normal diff --git a/src/mainboard/lenovo/t430/cmos.layout b/src/mainboard/lenovo/t430/cmos.layout index dd51c36854..3e48df5584 100644 --- a/src/mainboard/lenovo/t430/cmos.layout +++ b/src/mainboard/lenovo/t430/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 10 backlight -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 14 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -96,6 +98,8 @@ enumerations 13 0 Disable 13 1 AC and battery 13 2 AC only +14 0 Normal +14 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default index a30c90dc1f..52dbf70377 100644 --- a/src/mainboard/lenovo/t430s/cmos.default +++ b/src/mainboard/lenovo/t430s/cmos.default @@ -16,3 +16,4 @@ backlight=Both enable_dual_graphics=Disable usb_always_on=Disable f1_to_f12_as_primary=Enable +me_state=Normal diff --git a/src/mainboard/lenovo/t430s/cmos.layout b/src/mainboard/lenovo/t430s/cmos.layout index 02c1ea78df..14a21eb84e 100644 --- a/src/mainboard/lenovo/t430s/cmos.layout +++ b/src/mainboard/lenovo/t430s/cmos.layout @@ -35,7 +35,9 @@ entries 422 2 e 10 backlight 424 1 e 1 f1_to_f12_as_primary -# coreboot config options: cpu +# coreboot config options: ME +425 1 e 13 me_state +426 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -94,6 +96,8 @@ enumerations 12 0 Disable 12 1 AC and battery 12 2 AC only +13 0 Normal +13 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default index 6e61dae340..cf79b391e2 100644 --- a/src/mainboard/lenovo/t520/cmos.default +++ b/src/mainboard/lenovo/t520/cmos.default @@ -15,3 +15,4 @@ trackpoint=Enable backlight=Both hybrid_graphics_mode=Integrated Only usb_always_on=Disable +me_state=Normal diff --git a/src/mainboard/lenovo/t520/cmos.layout b/src/mainboard/lenovo/t520/cmos.layout index dd51c36854..3e48df5584 100644 --- a/src/mainboard/lenovo/t520/cmos.layout +++ b/src/mainboard/lenovo/t520/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 10 backlight -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 14 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -96,6 +98,8 @@ enumerations 13 0 Disable 13 1 AC and battery 13 2 AC only +14 0 Normal +14 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default index 6e61dae340..cf79b391e2 100644 --- a/src/mainboard/lenovo/t530/cmos.default +++ b/src/mainboard/lenovo/t530/cmos.default @@ -15,3 +15,4 @@ trackpoint=Enable backlight=Both hybrid_graphics_mode=Integrated Only usb_always_on=Disable +me_state=Normal diff --git a/src/mainboard/lenovo/t530/cmos.layout b/src/mainboard/lenovo/t530/cmos.layout index 6cd8ac066b..d109a61b4e 100644 --- a/src/mainboard/lenovo/t530/cmos.layout +++ b/src/mainboard/lenovo/t530/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 10 backlight -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 14 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -97,6 +99,8 @@ enumerations 13 0 Disable 13 1 AC and battery 13 2 AC only +14 0 Normal +14 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default index 42720a27bd..6d1d57a795 100644 --- a/src/mainboard/lenovo/x220/cmos.default +++ b/src/mainboard/lenovo/x220/cmos.default @@ -13,3 +13,4 @@ usb_always_on=Disable fn_ctrl_swap=Disable sticky_fn=Disable trackpoint=Enable +me_state=Normal diff --git a/src/mainboard/lenovo/x220/cmos.layout b/src/mainboard/lenovo/x220/cmos.layout index f152b2982a..c63ed8c22c 100644 --- a/src/mainboard/lenovo/x220/cmos.layout +++ b/src/mainboard/lenovo/x220/cmos.layout @@ -34,7 +34,9 @@ entries 421 1 e 9 sata_mode 422 2 e 12 usb_always_on -# coreboot config options: cpu +# coreboot config options: ME +424 1 e 13 me_state +425 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -92,6 +94,8 @@ enumerations 12 0 Disable 12 1 AC and battery 12 2 AC only +13 0 Normal +13 1 Disabled # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default index 5c19d0f4a5..7314066c2b 100644 --- a/src/mainboard/lenovo/x230/cmos.default +++ b/src/mainboard/lenovo/x230/cmos.default @@ -15,3 +15,4 @@ trackpoint=Enable backlight=Both usb_always_on=Disable f1_to_f12_as_primary=Enable +me_state=Normal diff --git a/src/mainboard/lenovo/x230/cmos.layout b/src/mainboard/lenovo/x230/cmos.layout index 89891bf0b0..914e8ff5f6 100644 --- a/src/mainboard/lenovo/x230/cmos.layout +++ b/src/mainboard/lenovo/x230/cmos.layout @@ -35,7 +35,9 @@ entries 422 2 e 10 backlight 424 1 e 1 f1_to_f12_as_primary -# coreboot config options: cpu +# coreboot config options: ME +425 1 e 13 me_state +426 2 h 0 me_state_prev # coreboot config options: northbridge 432 3 e 11 gfx_uma_size @@ -94,6 +96,8 @@ enumerations 12 0 Disable 12 1 AC and battery 12 2 AC only +13 0 Normal +13 1 Disabled # ----------------------------------------------------------------- checksums |