diff options
Diffstat (limited to 'src/mainboard')
156 files changed, 198 insertions, 198 deletions
diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c index 327a13ca52..b92256e7b8 100644 --- a/src/mainboard/a-trend/atc-6220/romstage.c +++ b/src/mainboard/a-trend/atc-6220/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/a-trend/atc-6240/romstage.c b/src/mainboard/a-trend/atc-6240/romstage.c index a15dc4be98..b771dd9396 100644 --- a/src/mainboard/a-trend/atc-6240/romstage.c +++ b/src/mainboard/a-trend/atc-6240/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1) diff --git a/src/mainboard/abit/be6-ii_v2_0/romstage.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c index 4b05e63cf0..ff3294a681 100644 --- a/src/mainboard/abit/be6-ii_v2_0/romstage.c +++ b/src/mainboard/abit/be6-ii_v2_0/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: It's a Winbond W83977EF, actually. */ -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> /* FIXME: It's a Winbond W83977EF, actually. */ diff --git a/src/mainboard/advantech/pcm-5820/romstage.c b/src/mainboard/advantech/pcm-5820/romstage.c index 86281e3ba4..d48ca7e530 100644 --- a/src/mainboard/advantech/pcm-5820/romstage.c +++ b/src/mainboard/advantech/pcm-5820/romstage.c @@ -26,7 +26,7 @@ #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977f/w83977f_early_serial.c" +#include "superio/winbond/w83977f/early_serial.c" #include "southbridge/amd/cs5530/enable_rom.c" #define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 188ec1f8f5..a811cd984c 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -33,7 +33,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/amd/dbm690t/acpi_tables.c b/src/mainboard/amd/dbm690t/acpi_tables.c index dcccdf019f..f960e6946f 100644 --- a/src/mainboard/amd/dbm690t/acpi_tables.c +++ b/src/mainboard/amd/dbm690t/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 6e3d3fcad1..ab43f46bd0 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -37,7 +37,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <spd.h> #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/amd/mahogany/acpi_tables.c b/src/mainboard/amd/mahogany/acpi_tables.c index c348f44897..5571bcdd79 100644 --- a/src/mainboard/amd/mahogany/acpi_tables.c +++ b/src/mainboard/amd/mahogany/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 4ad0aa0d3b..4f98e99a9b 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -38,7 +38,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8718f/it8718f_early_serial.c" +#include "superio/ite/it8718f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 92502e32a4..ea61a57732 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8718f/it8718f_early_serial.c" +#include "superio/ite/it8718f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -61,7 +61,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/amd/pistachio/acpi_tables.c b/src/mainboard/amd/pistachio/acpi_tables.c index 4a6d3c2664..bdf652bd3b 100644 --- a/src/mainboard/amd/pistachio/acpi_tables.c +++ b/src/mainboard/amd/pistachio/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 291d1f4607..08cf32775e 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <usbdebug.h> #include <spd.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index ecc22c08d3..7da3647c39 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -4,7 +4,7 @@ #include <device/pnp_def.h> #include <arch/hlt.h> #include <console/console.h> -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c index 42d9f23677..26c341a11a 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include "mb_sysconf.h" #define DUMP_ACPI_TABLES 0 diff --git a/src/mainboard/amd/serengeti_cheetah/dsdt.asl b/src/mainboard/amd/serengeti_cheetah/dsdt.asl index a0f5c2283a..da14fe89bf 100644 --- a/src/mainboard/amd/serengeti_cheetah/dsdt.asl +++ b/src/mainboard/amd/serengeti_cheetah/dsdt.asl @@ -206,7 +206,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) Z00A, 8 } - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" } diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 10b7eccdcc..6f1eeafab2 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -24,7 +24,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index ff0c1da06e..4a9a6ec775 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -45,7 +45,7 @@ #include <console/loglevel.h> #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" @@ -82,7 +82,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 8e22cdab49..66f0c32d25 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8718f/it8718f_early_serial.c" +#include "superio/ite/it8718f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c index 56e66e1e6c..5c5befed1b 100644 --- a/src/mainboard/arima/hdama/romstage.c +++ b/src/mainboard/arima/hdama/romstage.c @@ -16,7 +16,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87360/pc87360_early_serial.c" +#include "superio/nsc/pc87360/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/asi/mb_5blgp/romstage.c b/src/mainboard/asi/mb_5blgp/romstage.c index 1adca8a7ea..7a7e69c4f9 100644 --- a/src/mainboard/asi/mb_5blgp/romstage.c +++ b/src/mainboard/asi/mb_5blgp/romstage.c @@ -26,7 +26,7 @@ #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" -#include "superio/nsc/pc87351/pc87351_early_serial.c" +#include "superio/nsc/pc87351/early_serial.c" #include "southbridge/amd/cs5530/enable_rom.c" #define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1) diff --git a/src/mainboard/asi/mb_5blmp/romstage.c b/src/mainboard/asi/mb_5blmp/romstage.c index 01b5a78326..da7de0186b 100644 --- a/src/mainboard/asi/mb_5blmp/romstage.c +++ b/src/mainboard/asi/mb_5blmp/romstage.c @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc87351/pc87351_early_serial.c" +#include "superio/nsc/pc87351/early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/enable_rom.c" diff --git a/src/mainboard/asrock/939a785gmh/acpi_tables.c b/src/mainboard/asrock/939a785gmh/acpi_tables.c index c348f44897..5571bcdd79 100644 --- a/src/mainboard/asrock/939a785gmh/acpi_tables.c +++ b/src/mainboard/asrock/939a785gmh/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/asrock/939a785gmh/dsdt.asl b/src/mainboard/asrock/939a785gmh/dsdt.asl index 9dcfccfc49..4e624f2bec 100644 --- a/src/mainboard/asrock/939a785gmh/dsdt.asl +++ b/src/mainboard/asrock/939a785gmh/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include "acpi/debug.asl" */ /* Include global debug methods if needed */ - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" Name(HPBA, 0xFED00000) /* Base address of HPET table */ diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index c35d22b05b..76b8b510b9 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -39,7 +39,7 @@ #include <spd.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627dhg/w83627dhg_early_serial.c" +#include "superio/winbond/w83627dhg/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index f7ee69685f..8d01547695 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -34,7 +34,7 @@ #include <pc80/mc146818rtc.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <cpu/amd/model_fxx_rev.h> #include <console/console.h> #include "northbridge/amd/amdk8/incoherent_ht.c" diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index cbba7cf5b7..6785a2fca2 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -40,7 +40,7 @@ unsigned int get_sbdn(unsigned bus); #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/early_ht.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" +#include "superio/winbond/w83627ehg/early_serial.c" #include "southbridge/via/vt8237r/early_smbus.c" #include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */ #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index cbba7cf5b7..6785a2fca2 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -40,7 +40,7 @@ unsigned int get_sbdn(unsigned bus); #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/early_ht.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" +#include "superio/winbond/w83627ehg/early_serial.c" #include "southbridge/via/vt8237r/early_smbus.c" #include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */ #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/asus/m2v-mx_se/acpi_tables.c b/src/mainboard/asus/m2v-mx_se/acpi_tables.c index bce295dc45..73e37680b1 100644 --- a/src/mainboard/asus/m2v-mx_se/acpi_tables.c +++ b/src/mainboard/asus/m2v-mx_se/acpi_tables.c @@ -32,7 +32,7 @@ #include <device/pci_ids.h> #include "southbridge/via/vt8237r/vt8237r.h" #include "southbridge/via/k8t890/k8t890.h" -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; diff --git a/src/mainboard/asus/m2v-mx_se/dsdt.asl b/src/mainboard/asus/m2v-mx_se/dsdt.asl index b1c2d38707..1f5027ce86 100644 --- a/src/mainboard/asus/m2v-mx_se/dsdt.asl +++ b/src/mainboard/asus/m2v-mx_se/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) { - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 714b0544f7..4a147229e7 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -44,7 +44,7 @@ unsigned int get_sbdn(unsigned bus); #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include "southbridge/via/vt8237r/early_smbus.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/asus/m2v/acpi_tables.c b/src/mainboard/asus/m2v/acpi_tables.c index 2919517ddb..d8a52582aa 100644 --- a/src/mainboard/asus/m2v/acpi_tables.c +++ b/src/mainboard/asus/m2v/acpi_tables.c @@ -33,7 +33,7 @@ #include <device/pci_ids.h> #include "southbridge/via/vt8237r/vt8237r.h" #include "southbridge/via/k8t890/k8t890.h" -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index fab6d0ca34..3945f34f1f 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -44,7 +44,7 @@ unsigned int get_sbdn(unsigned bus); #include "lib/delay.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include "southbridge/via/vt8237r/early_smbus.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index e4514f6569..66f5574c97 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index e4514f6569..66f5574c97 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/asus/mew-am/romstage.c b/src/mainboard/asus/mew-am/romstage.c index ea28d56843..c04776c216 100644 --- a/src/mainboard/asus/mew-am/romstage.c +++ b/src/mainboard/asus/mew-am/romstage.c @@ -29,7 +29,7 @@ #include "northbridge/intel/i82810/raminit.h" #include "pc80/udelay_io.c" #include "cpu/x86/bist.h" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c index 60ae774155..ced590f726 100644 --- a/src/mainboard/asus/mew-vm/romstage.c +++ b/src/mainboard/asus/mew-vm/romstage.c @@ -25,7 +25,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "superio/smsc/lpc47b272/lpc47b272_early_serial.c" +#include "superio/smsc/lpc47b272/early_serial.c" #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax.h" diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c index ae09d8b8af..92c0e6cbfe 100644 --- a/src/mainboard/asus/p2b-d/romstage.c +++ b/src/mainboard/asus/p2b-d/romstage.c @@ -32,7 +32,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index 40038b57e8..ad0194dca5 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c index 658ac408ec..6b0fc7280a 100644 --- a/src/mainboard/asus/p2b-f/romstage.c +++ b/src/mainboard/asus/p2b-f/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */ -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */ diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c index 0bf4172e5a..dd9e5d2a56 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/romstage.c @@ -33,7 +33,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c index 327a13ca52..b92256e7b8 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index 97600fae65..38dffd5e54 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ diff --git a/src/mainboard/axus/tc320/romstage.c b/src/mainboard/axus/tc320/romstage.c index c79f42d9f0..e375d5119c 100644 --- a/src/mainboard/axus/tc320/romstage.c +++ b/src/mainboard/axus/tc320/romstage.c @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/pc97317_early_serial.c" +#include "superio/nsc/pc97317/early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/enable_rom.c" diff --git a/src/mainboard/azza/pt-6ibd/romstage.c b/src/mainboard/azza/pt-6ibd/romstage.c index 957a5f7eb4..eed674ab0b 100644 --- a/src/mainboard/azza/pt-6ibd/romstage.c +++ b/src/mainboard/azza/pt-6ibd/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: It's a Winbond W83977EF, actually. */ -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> /* FIXME: It's a Winbond W83977EF, actually. */ diff --git a/src/mainboard/bcom/winnet100/romstage.c b/src/mainboard/bcom/winnet100/romstage.c index c79f42d9f0..e375d5119c 100644 --- a/src/mainboard/bcom/winnet100/romstage.c +++ b/src/mainboard/bcom/winnet100/romstage.c @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/pc97317_early_serial.c" +#include "superio/nsc/pc97317/early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/enable_rom.c" diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c index 96df58a148..18bf62f87d 100644 --- a/src/mainboard/bcom/winnetp680/romstage.c +++ b/src/mainboard/bcom/winnetp680/romstage.c @@ -34,7 +34,7 @@ #include <lib.h> #include <spd.h> #include "southbridge/via/vt8237r/early_smbus.c" -#include "superio/winbond/w83697hf/w83697hf_early_serial.c" +#include "superio/winbond/w83697hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1) static inline int spd_read_byte(unsigned device, unsigned address) diff --git a/src/mainboard/biostar/m6tba/romstage.c b/src/mainboard/biostar/m6tba/romstage.c index 697d554076..5761db745d 100644 --- a/src/mainboard/biostar/m6tba/romstage.c +++ b/src/mainboard/biostar/m6tba/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1) diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index d96e7ff38f..14e7c8f47e 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -16,7 +16,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87417/pc87417_early_serial.c" +#include "superio/nsc/pc87417/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c index 718c096976..6b6e36eb9f 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c +++ b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" /* FIXME: This should be PC97307 (but it's buggy at the moment)! */ -#include "superio/nsc/pc97317/pc97317_early_serial.c" +#include "superio/nsc/pc97317/early_serial.c" #include <lib.h> /* FIXME: This should be PC97307 (but it's buggy at the moment)! */ diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c index 49060ea2ea..b43be3789d 100644 --- a/src/mainboard/dell/s1850/romstage.c +++ b/src/mainboard/dell/s1850/romstage.c @@ -8,7 +8,7 @@ #include <console/console.h> #include "southbridge/intel/i82801ex/early_smbus.c" #include "northbridge/intel/e7520/raminit.h" -#include "superio/nsc/pc8374/pc8374_early_init.c" +#include "superio/nsc/pc8374/early_init.c" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "debug.c" diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c index 12d6bb430b..baab1bda1d 100644 --- a/src/mainboard/digitallogic/adl855pc/romstage.c +++ b/src/mainboard/digitallogic/adl855pc/romstage.c @@ -13,7 +13,7 @@ #include "southbridge/intel/i82801dx/early_smbus.c" #include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 93391b45f7..a68e4fc7f4 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -14,7 +14,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/eaglelion/5bcm/romstage.c b/src/mainboard/eaglelion/5bcm/romstage.c index fa6f29f576..3c2deb7a0c 100644 --- a/src/mainboard/eaglelion/5bcm/romstage.c +++ b/src/mainboard/eaglelion/5bcm/romstage.c @@ -6,7 +6,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "superio/nsc/pc97317/pc97317_early_serial.c" +#include "superio/nsc/pc97317/early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/enable_rom.c" #include "northbridge/amd/gx1/raminit.c" diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c index 4e12777e64..2325e7613e 100644 --- a/src/mainboard/ecs/p6iwp-fe/romstage.c +++ b/src/mainboard/ecs/p6iwp-fe/romstage.c @@ -30,7 +30,7 @@ #include "northbridge/intel/i82810/raminit.h" #include "pc80/udelay_io.c" #include "cpu/x86/bist.h" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <lib.h> void main(unsigned long bist) diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c index f4ed6fa89d..ec876ff699 100644 --- a/src/mainboard/gigabyte/ga-6bxc/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" void it8671f_48mhz_clkin(void); -#include "superio/ite/it8671f/it8671f_early_serial.c" +#include "superio/ite/it8671f/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1) diff --git a/src/mainboard/gigabyte/ga-6bxe/romstage.c b/src/mainboard/gigabyte/ga-6bxe/romstage.c index 31af09e62c..45d7c5e7da 100644 --- a/src/mainboard/gigabyte/ga-6bxe/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxe/romstage.c @@ -33,7 +33,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" static void it8671f_48mhz_clkin(void); -#include "superio/ite/it8671f/it8671f_early_serial.c" +#include "superio/ite/it8671f/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1) diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 86e3f6f24c..50c52b67c5 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -46,8 +46,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8716f/it8716f_early_serial.c" -#include "superio/ite/it8716f/it8716f_early_init.c" +#include "superio/ite/it8716f/early_serial.c" +#include "superio/ite/it8716f/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -64,7 +64,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/gigabyte/m57sli/acpi_tables.c b/src/mainboard/gigabyte/m57sli/acpi_tables.c index 66619589e4..2e2e6a06ea 100644 --- a/src/mainboard/gigabyte/m57sli/acpi_tables.c +++ b/src/mainboard/gigabyte/m57sli/acpi_tables.c @@ -29,7 +29,7 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci_ids.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> #include <device/pci.h> #include <cpu/amd/amdk8_sysconf.h> diff --git a/src/mainboard/gigabyte/m57sli/dsdt.asl b/src/mainboard/gigabyte/m57sli/dsdt.asl index a8c4242bff..44e9e6bc29 100644 --- a/src/mainboard/gigabyte/m57sli/dsdt.asl +++ b/src/mainboard/gigabyte/m57sli/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) { - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 55d95a571f..749b1d9a78 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -42,8 +42,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8716f/it8716f_early_serial.c" -#include "superio/ite/it8716f/it8716f_early_init.c" +#include "superio/ite/it8716f/early_serial.c" +#include "superio/ite/it8716f/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 10d369287d..b6c732b13d 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -38,7 +38,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8718f/it8718f_early_serial.c" +#include "superio/ite/it8718f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -56,7 +56,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 7245eb9d91..39b2d74953 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/ite/it8718f/it8718f_early_serial.c" +#include "superio/ite/it8718f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 59dfc0351d..ebd81c87fb 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -16,7 +16,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 2687aea672..4f44dd837c 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -46,9 +46,9 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/serverengines/pilot/pilot_early_serial.c" -#include "superio/serverengines/pilot/pilot_early_init.c" -#include "superio/nsc/pc87417/pc87417_early_serial.c" +#include "superio/serverengines/pilot/early_serial.c" +#include "superio/serverengines/pilot/early_init.c" +#include "superio/nsc/pc87417/early_serial.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -74,7 +74,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 902be52dd3..56ee31b27f 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -48,9 +48,9 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" -#include "superio/serverengines/pilot/pilot_early_serial.c" -#include "superio/serverengines/pilot/pilot_early_init.c" -#include "superio/nsc/pc87417/pc87417_early_serial.c" +#include "superio/serverengines/pilot/early_serial.c" +#include "superio/serverengines/pilot/early_init.c" +#include "superio/nsc/pc87417/early_serial.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -78,7 +78,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode/microcode.c" diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c index 1ecc686ddb..e00d135353 100644 --- a/src/mainboard/hp/e_vectra_p2706t/romstage.c +++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c @@ -27,7 +27,7 @@ #include <stdlib.h> #include <console/console.h> /* TODO: It's a PC87364 actually! */ -#include "superio/nsc/pc87360/pc87360_early_serial.c" +#include "superio/nsc/pc87360/early_serial.c" /* TODO: It's i810E actually! */ #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/bist.h" diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index f85fa16af5..15a735e9fa 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -32,7 +32,7 @@ #include <console/console.h> #include <usbdebug.h> #include <cpu/x86/bist.h> -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" +#include "superio/winbond/w83627ehg/early_serial.c" #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c index 590565e4cf..ecfb32a4f3 100644 --- a/src/mainboard/ibm/e325/romstage.c +++ b/src/mainboard/ibm/e325/romstage.c @@ -17,7 +17,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87366/pc87366_early_serial.c" +#include "superio/nsc/pc87366/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c index 5adc8fb22b..bc991a450d 100644 --- a/src/mainboard/ibm/e326/romstage.c +++ b/src/mainboard/ibm/e326/romstage.c @@ -17,7 +17,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87366/pc87366_early_serial.c" +#include "superio/nsc/pc87366/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c index 54ada03b5d..d0adbf1264 100644 --- a/src/mainboard/iei/juki-511p/romstage.c +++ b/src/mainboard/iei/juki-511p/romstage.c @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "superio/winbond/w83977f/w83977f_early_serial.c" +#include "superio/winbond/w83977f/early_serial.c" #include "southbridge/amd/cs5530/enable_rom.c" #include "cpu/x86/bist.h" #include "pc80/udelay_io.c" diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 0473d5f92b..eaf980e943 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -42,7 +42,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/fintek/f71859/f71859_early_serial.c" +#include "superio/fintek/f71859/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -62,7 +62,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c index 50b114e185..63da15d541 100644 --- a/src/mainboard/iei/nova4899r/romstage.c +++ b/src/mainboard/iei/nova4899r/romstage.c @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include "southbridge/amd/cs5530/enable_rom.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index d011ed13dc..b5dcf22a3f 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -33,7 +33,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c index 81e2d5d348..249a9a1d21 100644 --- a/src/mainboard/intel/d810e2cb/romstage.c +++ b/src/mainboard/intel/d810e2cb/romstage.c @@ -29,7 +29,7 @@ #include "northbridge/intel/i82810/raminit.h" #include "pc80/udelay_io.c" #include "cpu/x86/bist.h" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include "gpio.c" #include <lib.h> diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 8b02163ab8..e47f08c3c2 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -32,7 +32,7 @@ #include <console/console.h> #include <usbdebug.h> #include <cpu/x86/bist.h> -#include "superio/smsc/lpc47m15x/lpc47m15x_early_serial.c" +#include "superio/smsc/lpc47m15x/early_serial.c" #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index e91fcd052d..1178abf897 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -34,8 +34,8 @@ #include "southbridge/intel/i3100/early_smbus.c" #include "southbridge/intel/i3100/early_lpc.c" #include "reset.c" -#include "superio/intel/i3100/i3100_early_serial.c" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/intel/i3100/early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include "northbridge/intel/i3100/i3100.h" #include "southbridge/intel/i3100/i3100.h" diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c index 8ce1cd24da..c6fbc323d3 100644 --- a/src/mainboard/intel/jarrell/romstage.c +++ b/src/mainboard/intel/jarrell/romstage.c @@ -15,7 +15,7 @@ #include "reset.c" #include "power_reset_check.c" #include "jarrell_fixups.c" -#include "superio/nsc/pc87427/pc87427_early_init.c" +#include "superio/nsc/pc87427/early_init.c" #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index e397eaefb7..68e94ec40e 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -32,7 +32,7 @@ #include "northbridge/intel/i3100/raminit.h" #include "superio/intel/i3100/i3100.h" #include "cpu/x86/mtrr/earlymtrr.c" -#include "superio/intel/i3100/i3100_early_serial.c" +#include "superio/intel/i3100/early_serial.c" #include "northbridge/intel/i3100/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 6d29c57c75..f57c36b44d 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -34,7 +34,7 @@ #include "superio/intel/i3100/i3100.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "superio/intel/i3100/i3100_early_serial.c" +#include "superio/intel/i3100/early_serial.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c index d594091752..953302f3e5 100644 --- a/src/mainboard/intel/xe7501devkit/romstage.c +++ b/src/mainboard/intel/xe7501devkit/romstage.c @@ -12,7 +12,7 @@ #include "northbridge/intel/e7501/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/debug.c" -#include "superio/smsc/lpc47b272/lpc47b272_early_serial.c" +#include "superio/smsc/lpc47b272/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c index 9cd755ea65..400dc0ee80 100644 --- a/src/mainboard/iwill/dk8_htx/acpi_tables.c +++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include "mb_sysconf.h" #define DUMP_ACPI_TABLES 0 diff --git a/src/mainboard/iwill/dk8_htx/dsdt.asl b/src/mainboard/iwill/dk8_htx/dsdt.asl index a0f5c2283a..da14fe89bf 100644 --- a/src/mainboard/iwill/dk8_htx/dsdt.asl +++ b/src/mainboard/iwill/dk8_htx/dsdt.asl @@ -206,7 +206,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) Z00A, 8 } - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" } diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index 3a420c03ff..f36fff0843 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -22,7 +22,7 @@ #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index 8181abc200..dbe8313bb1 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -22,7 +22,7 @@ #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index 0701234ee5..dc043ae142 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -22,7 +22,7 @@ #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c index 401fe67617..b4e4413e0f 100644 --- a/src/mainboard/jetway/j7f24/romstage.c +++ b/src/mainboard/jetway/j7f24/romstage.c @@ -32,7 +32,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "southbridge/via/vt8237r/early_smbus.c" -#include "superio/fintek/f71805f/f71805f_early_serial.c" +#include "superio/fintek/f71805f/early_serial.c" #include <lib.h> #include <spd.h> diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index b5b9ab3d4b..02c34b9148 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -43,7 +43,7 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -#include "superio/fintek/f71863fg/f71863fg_early_serial.c" +#include "superio/fintek/f71863fg/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> @@ -67,7 +67,7 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "cpu/amd/car/post_cache_as_ram.c" diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index bd42f5f68e..0b93259ba2 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -33,7 +33,7 @@ #include "option_table.h" #include <console/console.h> #include <cpu/x86/bist.h> -#include "superio/winbond/w83627thg/w83627thg_early_serial.c" +#include "superio/winbond/w83627thg/early_serial.c" #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" diff --git a/src/mainboard/kontron/kt690/acpi_tables.c b/src/mainboard/kontron/kt690/acpi_tables.c index 02f04cf0b8..b3db6aad67 100644 --- a/src/mainboard/kontron/kt690/acpi_tables.c +++ b/src/mainboard/kontron/kt690/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 6c9e3ef345..fc792e6ad8 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -40,7 +40,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627dhg/w83627dhg_early_serial.c" +#include "superio/winbond/w83627dhg/early_serial.c" #include <usbdebug.h> #include <cpu/amd/mtrr.h> #include "cpu/x86/bist.h" diff --git a/src/mainboard/lanner/em8510/romstage.c b/src/mainboard/lanner/em8510/romstage.c index ba7a2959de..a1701034af 100644 --- a/src/mainboard/lanner/em8510/romstage.c +++ b/src/mainboard/lanner/em8510/romstage.c @@ -36,7 +36,7 @@ #include "southbridge/intel/i82801dx/early_smbus.c" #include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/debug.c" -#include "superio/winbond/w83627thg/w83627thg_early_serial.c" +#include "superio/winbond/w83627thg/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c index f96b93bb60..3047ceb026 100644 --- a/src/mainboard/lippert/frontrunner/romstage.c +++ b/src/mainboard/lippert/frontrunner/romstage.c @@ -5,7 +5,7 @@ #include <device/pnp_def.h> #include <arch/hlt.h> #include <console/console.h> -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 1a56251557..e0157abf33 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -36,7 +36,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" /* Bit0 enables Spread Spectrum. */ #define SMC_CONFIG 0x01 diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index aa89cac523..8c7d50622e 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -36,7 +36,7 @@ #include "southbridge/amd/cs5536/cs5536.h" #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" /* Bit0 enables Spread Spectrum, bit1 makes on-board CF slot act as IDE slave. */ #if CONFIG_ONBOARD_IDE_SLAVE diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 331ba5dfe5..413e1f04af 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -36,7 +36,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #define ManualConf 1 /* No automatic strapped PLL config */ #define PLLMSRhi 0x0000049C /* Manual settings for the PLL */ diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 462a2b5b9a..cb2e27db73 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -36,7 +36,7 @@ #include "southbridge/amd/cs5536/cs5536.h" #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" /* Bit0 enables Spread Spectrum, bit1 makes on-board SSD act as IDE slave. */ #if CONFIG_ONBOARD_IDE_SLAVE diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c index d0cdc178be..ab8a9c7af5 100644 --- a/src/mainboard/mitac/6513wu/romstage.c +++ b/src/mainboard/mitac/6513wu/romstage.c @@ -30,7 +30,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c index 950c838ebc..5ee54e298a 100644 --- a/src/mainboard/msi/ms6119/romstage.c +++ b/src/mainboard/msi/ms6119/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c index b3b40b21f1..f79c49af27 100644 --- a/src/mainboard/msi/ms6147/romstage.c +++ b/src/mainboard/msi/ms6147/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include <cpu/x86/bist.h> -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c index 04b25208b2..cc546128d1 100644 --- a/src/mainboard/msi/ms6156/romstage.c +++ b/src/mainboard/msi/ms6156/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include "superio/winbond/w83977tf/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c index dd3a5226a8..e887a37fa0 100644 --- a/src/mainboard/msi/ms6178/romstage.c +++ b/src/mainboard/msi/ms6178/romstage.c @@ -25,7 +25,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax.h" diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index 53d7e509f5..617dd8079a 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -32,7 +32,7 @@ #include <pc80/mc146818rtc.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627thg/w83627thg_early_serial.c" +#include "superio/winbond/w83627thg/early_serial.c" #include <cpu/amd/model_fxx_rev.h> #include <console/console.h> #include "northbridge/amd/amdk8/incoherent_ht.c" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index e5b4b47fbe..7fae43d720 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -44,8 +44,8 @@ #include <spd.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_init.c" +#include "superio/winbond/w83627ehg/early_serial.c" +#include "superio/winbond/w83627ehg/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -62,7 +62,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index ee2847b17e..748b2ad983 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -42,7 +42,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87417/pc87417_early_serial.c" +#include "superio/nsc/pc87417/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" @@ -77,7 +77,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 599b8b60ca..0b7b634cc2 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -39,7 +39,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" +#include "superio/winbond/w83627ehg/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include <spd.h> @@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/msi/ms9652_fam10/dsdt.asl b/src/mainboard/msi/ms9652_fam10/dsdt.asl index 854c6d0c37..c0ed9699e2 100644 --- a/src/mainboard/msi/ms9652_fam10/dsdt.asl +++ b/src/mainboard/msi/ms9652_fam10/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) { - #include "../../../../src/northbridge/amd/amdk8/amdk8_util.asl" + #include "../../../../src/northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 9150a832d3..d82fceef2c 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -42,7 +42,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" +#include "superio/winbond/w83627ehg/early_serial.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -60,7 +60,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" diff --git a/src/mainboard/nec/powermate2000/romstage.c b/src/mainboard/nec/powermate2000/romstage.c index 95fa3b20ec..d069741184 100644 --- a/src/mainboard/nec/powermate2000/romstage.c +++ b/src/mainboard/nec/powermate2000/romstage.c @@ -25,7 +25,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax.h" diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index 1a6cdbc0a5..20dd363409 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -24,7 +24,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/nokia/ip530/romstage.c b/src/mainboard/nokia/ip530/romstage.c index b3f29de016..671c5bb4e5 100644 --- a/src/mainboard/nokia/ip530/romstage.c +++ b/src/mainboard/nokia/ip530/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1) diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index 508ea83bd0..3929bf4ea8 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -43,8 +43,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" -#include "superio/winbond/w83627ehg/w83627ehg_early_init.c" +#include "superio/winbond/w83627ehg/early_serial.c" +#include "superio/winbond/w83627ehg/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 609baf6e5f..68f6f84b99 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -39,7 +39,7 @@ static void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" /* The part is a Hynix hy5du121622ctp-d43. * diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c index 6df8d41f38..ba9a606c57 100644 --- a/src/mainboard/rca/rm4100/romstage.c +++ b/src/mainboard/rca/rm4100/romstage.c @@ -28,7 +28,7 @@ #include "pc80/udelay_io.c" #include <console/console.h> #include <lib.h> -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include "northbridge/intel/i82830/raminit.h" #include "northbridge/intel/i82830/memory_initialized.c" #include "southbridge/intel/i82801dx/i82801dx.h" diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c index de87edb451..0763a9a901 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c +++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c @@ -32,7 +32,7 @@ #include "lib/delay.c" #include "cpu/x86/bist.h" void it8671f_48mhz_clkin(void); -#include "superio/ite/it8671f/it8671f_early_serial.c" +#include "superio/ite/it8671f/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1) diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index 21d50469d7..8e26beb54c 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -18,10 +18,10 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/smsc/lpc47b397/lpc47b397_early_serial.c" +#include "superio/smsc/lpc47b397/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" -#include "superio/smsc/lpc47b397/lpc47b397_early_gpio.c" +#include "superio/smsc/lpc47b397/early_gpio.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, LPC47B397_SP1) diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 8ba4f2604c..fe5aa812c0 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -39,8 +39,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -120,7 +120,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 65517ec31e..7eeb7f8639 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -42,8 +42,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 90f0d93a37..327ae36226 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -41,8 +41,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index e6591d90d6..1d6bcf49c8 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -41,8 +41,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -67,7 +67,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #include "southbridge/nvidia/mcp55/early_setup_ss.h" diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c index 8815d19f98..01484c85ec 100644 --- a/src/mainboard/supermicro/x6dai_g/romstage.c +++ b/src/mainboard/supermicro/x6dai_g/romstage.c @@ -16,7 +16,7 @@ #include "debug.c" #include "watchdog.c" #include "reset.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/e7525/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c index 74e1bd8593..4068985bf9 100644 --- a/src/mainboard/supermicro/x6dhe_g/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g/romstage.c @@ -16,7 +16,7 @@ #include "debug.c" #include "watchdog.c" #include "reset.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 72e3b9da5b..b8fc164f2e 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -14,7 +14,7 @@ #include "debug.c" #include "watchdog.c" #include "reset.c" -#include "superio/nsc/pc87427/pc87427_early_init.c" +#include "superio/nsc/pc87427/early_init.c" #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c index f37d565b20..13226f35e5 100644 --- a/src/mainboard/supermicro/x6dhr_ig/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c @@ -14,7 +14,7 @@ #include "debug.c" #include "watchdog.c" #include "reset.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index 166d56c0f1..82aa6c9916 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -14,7 +14,7 @@ #include "debug.c" #include "watchdog.c" #include "reset.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> diff --git a/src/mainboard/technexion/tim5690/acpi_tables.c b/src/mainboard/technexion/tim5690/acpi_tables.c index 02f04cf0b8..b3db6aad67 100644 --- a/src/mainboard/technexion/tim5690/acpi_tables.c +++ b/src/mainboard/technexion/tim5690/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 7f72a32a89..1106f7caf9 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -39,7 +39,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/technexion/tim8690/acpi_tables.c b/src/mainboard/technexion/tim8690/acpi_tables.c index 02f04cf0b8..b3db6aad67 100644 --- a/src/mainboard/technexion/tim8690/acpi_tables.c +++ b/src/mainboard/technexion/tim8690/acpi_tables.c @@ -26,7 +26,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <arch/cpu.h> #include <cpu/amd/model_fxx_powernow.h> diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index 490eaa5481..1cead6ca63 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -39,7 +39,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/ite/it8712f/it8712f_early_serial.c" +#include "superio/ite/it8712f/early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/televideo/tc7020/romstage.c b/src/mainboard/televideo/tc7020/romstage.c index c79f42d9f0..e375d5119c 100644 --- a/src/mainboard/televideo/tc7020/romstage.c +++ b/src/mainboard/televideo/tc7020/romstage.c @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <console/console.h> #include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/pc97317_early_serial.c" +#include "superio/nsc/pc97317/early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/enable_rom.c" diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c index 047d704073..e1bdf781bb 100644 --- a/src/mainboard/thomson/ip1000/romstage.c +++ b/src/mainboard/thomson/ip1000/romstage.c @@ -29,7 +29,7 @@ #include "pc80/udelay_io.c" #include <console/console.h> #include <lib.h> -#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "superio/smsc/smscsuperio/early_serial.c" #include "northbridge/intel/i82830/raminit.h" #include "northbridge/intel/i82830/memory_initialized.c" #include "southbridge/intel/i82801dx/i82801dx.h" diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c index fb48f0702e..bf2debc4a2 100644 --- a/src/mainboard/tyan/s1846/romstage.c +++ b/src/mainboard/tyan/s1846/romstage.c @@ -31,7 +31,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/bist.h" -#include "superio/nsc/pc87309/pc87309_early_serial.c" +#include "superio/nsc/pc87309/early_serial.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1) diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c index eaddf9a290..5a8174380e 100644 --- a/src/mainboard/tyan/s2735/romstage.c +++ b/src/mainboard/tyan/s2735/romstage.c @@ -12,7 +12,7 @@ #include "southbridge/intel/i82801ex/early_smbus.c" #include "northbridge/intel/e7501/raminit.h" #include "northbridge/intel/e7501/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index a45d6dfa1c..8efa54276a 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -19,7 +19,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index 7681e88f31..9f8be3bfa5 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -19,7 +19,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index a1312659f8..c1ce412584 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -19,7 +19,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index 22f24bbd18..163ae26746 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -18,7 +18,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index a1312659f8..c1ce412584 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -19,7 +19,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index 963ba1b7ef..80f02db891 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -18,7 +18,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2891/acpi_tables.c b/src/mainboard/tyan/s2891/acpi_tables.c index 62fece77ba..62c2b54b41 100644 --- a/src/mainboard/tyan/s2891/acpi_tables.c +++ b/src/mainboard/tyan/s2891/acpi_tables.c @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; diff --git a/src/mainboard/tyan/s2891/dsdt.asl b/src/mainboard/tyan/s2891/dsdt.asl index 3936b93cd7..02bf15faa7 100644 --- a/src/mainboard/tyan/s2891/dsdt.asl +++ b/src/mainboard/tyan/s2891/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) { - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index c059592e8d..67dea33fcc 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -18,7 +18,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2892/acpi_tables.c b/src/mainboard/tyan/s2892/acpi_tables.c index 62fece77ba..62c2b54b41 100644 --- a/src/mainboard/tyan/s2892/acpi_tables.c +++ b/src/mainboard/tyan/s2892/acpi_tables.c @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; diff --git a/src/mainboard/tyan/s2892/dsdt.asl b/src/mainboard/tyan/s2892/dsdt.asl index d4242c3dc2..44912f42e3 100644 --- a/src/mainboard/tyan/s2892/dsdt.asl +++ b/src/mainboard/tyan/s2892/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) { - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 820e05ff96..a03f6c0573 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -18,7 +18,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s2895/acpi_tables.c b/src/mainboard/tyan/s2895/acpi_tables.c index c9b764d280..04fa55ca19 100644 --- a/src/mainboard/tyan/s2895/acpi_tables.c +++ b/src/mainboard/tyan/s2895/acpi_tables.c @@ -17,7 +17,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdk8_sysconf.h> -#include "northbridge/amd/amdk8/amdk8_acpi.h" +#include "northbridge/amd/amdk8/acpi.h" #include <cpu/amd/model_fxx_powernow.h> extern const unsigned char AmlCode[]; diff --git a/src/mainboard/tyan/s2895/dsdt.asl b/src/mainboard/tyan/s2895/dsdt.asl index b3ac536d28..a7dfb06cb9 100644 --- a/src/mainboard/tyan/s2895/dsdt.asl +++ b/src/mainboard/tyan/s2895/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) { - #include "northbridge/amd/amdk8/amdk8_util.asl" + #include "northbridge/amd/amdk8/util.asl" /* For now only define 2 power states: * - S0 which is fully on diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index db534f021f..bede83755e 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -17,8 +17,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/smsc/lpc47b397/lpc47b397_early_serial.c" -#include "superio/smsc/lpc47b397/lpc47b397_early_gpio.c" +#include "superio/smsc/lpc47b397/early_serial.c" +#include "superio/smsc/lpc47b397/early_gpio.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include <cpu/amd/mtrr.h> diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index aa6107637d..f6116f978b 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -43,8 +43,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/f.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index c9c8561030..976f691531 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -42,8 +42,8 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "superio/winbond/w83627hf/w83627hf_early_init.c" +#include "superio/winbond/w83627hf/early_serial.c" +#include "superio/winbond/w83627hf/early_init.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "cpu/x86/mtrr/earlymtrr.c" @@ -61,7 +61,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdfam10/amdfam10.h" #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/amdfam10_pci.c" +#include "northbridge/amd/amdfam10/pci.c" #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c index 6e480699db..737378d358 100644 --- a/src/mainboard/tyan/s4880/romstage.c +++ b/src/mainboard/tyan/s4880/romstage.c @@ -18,7 +18,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index c21388f545..bbb0ec4668 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -17,7 +17,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 85522c03d9..1040a1247e 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -43,7 +43,7 @@ #include "northbridge/via/vx800/raminit.h" #include "northbridge/via/vx800/raminit.c" #include "wakeup.h" -#include "superio/winbond/w83697hf/w83697hf_early_serial.c" +#include "superio/winbond/w83697hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1) #define DUMMY_DEV PNP_DEV(0x2e, 0) diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c index aa35858224..e12bdb3d09 100644 --- a/src/mainboard/via/epia-n/romstage.c +++ b/src/mainboard/via/epia-n/romstage.c @@ -34,7 +34,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "southbridge/via/vt8237r/early_smbus.c" -#include "superio/winbond/w83697hf/w83697hf_early_serial.c" +#include "superio/winbond/w83697hf/early_serial.c" #include <spd.h> #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1) diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c index 0fded96d0c..caaa171dd3 100644 --- a/src/mainboard/via/pc2500e/romstage.c +++ b/src/mainboard/via/pc2500e/romstage.c @@ -33,7 +33,7 @@ #include "pc80/udelay_io.c" #include "lib/delay.c" #include "southbridge/via/vt8237r/early_smbus.c" -#include "superio/ite/it8716f/it8716f_early_serial.c" +#include "superio/ite/it8716f/early_serial.c" #include <spd.h> #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c index 5dbd34070b..9a6a6ca25b 100644 --- a/src/mainboard/via/vt8454c/romstage.c +++ b/src/mainboard/via/vt8454c/romstage.c @@ -32,9 +32,9 @@ #include "cpu/x86/bist.h" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "northbridge/via/cx700/cx700_early_smbus.c" +#include "northbridge/via/cx700/early_smbus.c" #include "lib/debug.c" -#include "northbridge/via/cx700/cx700_early_serial.c" +#include "northbridge/via/cx700/early_serial.c" #include "northbridge/via/cx700/raminit.c" #include <spd.h> diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 318b560fba..7efb83ff32 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -35,7 +35,7 @@ #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" -#include "superio/winbond/w83627hf/w83627hf_early_serial.c" +#include "superio/winbond/w83627hf/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) |