diff options
Diffstat (limited to 'src/mainboard')
6 files changed, 4 insertions, 18 deletions
diff --git a/src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb b/src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb index bcad954885..d77633ddd7 100644 --- a/src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb @@ -44,8 +44,6 @@ chip soc/intel/icelake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - register "PrmrrSize" = "0x10000000" - register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/intel/glkrvp/Kconfig b/src/mainboard/intel/glkrvp/Kconfig index 3380762736..ebb5a3a07b 100644 --- a/src/mainboard/intel/glkrvp/Kconfig +++ b/src/mainboard/intel/glkrvp/Kconfig @@ -86,4 +86,8 @@ config IS_GLK_RVP_1 bool "Is this RVP1?" default n +config SOC_INTEL_COMMON_BLOCK_SGX_ENABLE + bool + default y + endif # BOARD_INTEL_GLKRVP diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index d3d0b00c8e..c5ad27dca6 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -97,14 +97,6 @@ chip soc/intel/apollolake # Minimum SLP S3 assertion width 28ms. register "slp_s3_assertion_width_usecs" = "28000" - register "sgx_enable" = "1" - - # PRMRR size options - # 0x02000000 - 32MiB - # 0x04000000 - 64MiB - # 0x08000000 - 128MiB - register "PrmrrSize" = "128 * MiB" - register "pnp_settings" = "PNP_PERF_POWER" device domain 0 on diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb index 6d7fad7623..12accedec4 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb @@ -48,8 +48,6 @@ chip soc/intel/icelake register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" - register "PrmrrSize" = "0x10000000" - register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb index 4f4130853e..b12c0f7b6c 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb @@ -48,8 +48,6 @@ chip soc/intel/icelake register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" - register "PrmrrSize" = "0x10000000" - register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 1b9dc271b6..b58fbf1470 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -17,10 +17,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "SaGv" = "SaGv_Disabled" - # Enable SGX - register "sgx_enable" = "1" - register "PrmrrSize" = "128 * MiB" - register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" register "pirqc_routing" = "PCH_IRQ11" |