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-rw-r--r--src/mainboard/emulation/spike-riscv/memlayout.ld14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld
index 276483f336..8d35a64a9c 100644
--- a/src/mainboard/emulation/spike-riscv/memlayout.ld
+++ b/src/mainboard/emulation/spike-riscv/memlayout.ld
@@ -17,12 +17,14 @@
#include <arch/header.ld>
+#define START 0x80000000
+
SECTIONS
{
- DRAM_START(0x0)
- BOOTBLOCK(0x0, 64K)
- STACK(8M, 64K)
- ROMSTAGE(8M + 64K, 128K)
- PRERAM_CBMEM_CONSOLE(8M + 192k, 8K)
- RAMSTAGE(8M + 200K, 256K)
+ DRAM_START(START)
+ BOOTBLOCK(START, 64K)
+ STACK(START + 8M, 64K)
+ ROMSTAGE(START + 8M + 64K, 128K)
+ PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K)
+ RAMSTAGE(START + 8M + 200K, 256K)
}